78Q2120C Teridian Semiconductor Corp. (TDK Semiconductor), 78Q2120C Datasheet - Page 16

• Manufacturer Part Number: 78Q2120C
• Description: 10/100 Ethernet PHYS
• Manufacturer: Teridian Semiconductor Corp. (TDK Semiconductor)

MR16: Vendor Specific Register
© 2003 TDK Semiconductor Corporation, Proprietary and Confidential
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Bit
RVSPOL
Symbol
TXHIM
INPOL
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RPTR
APOL
SQEI
NL10
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Default Description
(0)
0h
0
0
0
0
0
0
1
0
1
0
0
Repeater Mode: When set, the 78Q2120C is put into Repeater mode
of operation. In this mode, full duplex is prohibited, CRS responds to
receive activity only and, in 10Base-T mode, the SQE test function is
disabled.
When this bit is ‘0’, the INTR pin is forced low to signal an interrupt.
Setting this bit to ‘1’ causes the INTR pin to be forced high to signal an
interrupt.
Reserved
Transmitter High-Impedance Mode:
transmit pins and the TX_CLK pin are put into a high-impedance state.
The receive circuitry remains fully functional.
SQE Test Inhibit: Setting this bit to ‘1’ disables 10Base-T SQE testing.
By default, this bit is ‘0’ and the SQE test is performed by generating a
COL pulse following the completion of a packet transmission.
10Base-T Natural Loopback: Setting this bit to ‘1’ causes transmit data
received on the TXD0-3 pins to be automatically looped back to the
RXD[0:3] pins when 10Base-T mode is enabled.
Reserved
Reserved
Reserved
Reserved
Auto Polarity:
78Q2120C is able to automatically invert the received signal due to a
wrong polarity connection. It does so by detecting the polarity of the
link pulses. Setting this bit to ‘1’ disables this feature.
Reverse Polarity: The reverse polarity is detected either through 8
inverted 10Base-T link pulses (NLP) or through one burst of inverted
clock pulses in the auto-negotiation link pulses (FLP).
reverse polarity is detected and if the Auto Polarity feature is enabled,
the 78Q2120C will invert the receive data input and set this bit to ‘1’. If
Auto Polarity is disabled, then this bit is writeable. Writing a ‘1’ to this
bit forces the polarity of the receive signal to be reversed.
Reserved: Must set to ‘00’.
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During auto-negotiation and 10BASE-T mode, the
10/100BASE-TX Transceiver
When set, the TXOP/TXON
78Q2120C
When the
Rev_1.1