ATA5423 ATMEL Corporation, ATA5423 Datasheet - Page 48

• Manufacturer Part Number: ATA5423
• Manufacturer: ATMEL Corporation

7.8
Figure 7-6.
48
Pin VAUX
ATA5423/25/28/29 [Preliminary]
(Status Register)
P_On_Aux
N_RESET
Timing Pin VAUX, Status Bit P_On_Aux
VSOUT
VAUX
DVCC
CLK
IRQ
To switch the transceiver from OFF to AUX mode, the voltage V
3.5 V (typically) (see
DVCC and the power supply for external devices VSOUT are switched on.
If V
After the voltage on pin VSOUT exceeds 2.3 V (typically) and the start–up time of the XTO is
elapsed, the output clock on pin CLK is available. Because the enabling of pin CLK is asynchro-
nous, the first clock cycle may be incomplete. N_RESET is set to high if V
(typically) and the XTO is settled.
If the transceiver is in any active mode (IDLE, TX, RX, RX_Polling), a positive edge on pin VAUX
and V
an interrupt. If P_On_Aux is still “1” during the positive edge on pin VAUX no interrupt is issued.
P_On_Aux and the interrupt are deleted after reading the status register.
V
V
3.5 V (typ)
2.0 V (typ)
Thres_2
Thres_1
Mode
OFF
VAUX
VAUX
= 2.38 V (typ)
= 2.3 V (typ)
exceeds 3.5 V (typically) the status bit P_On_Aux is set to “1” and an interrupt is issued.
> VS1 + 0.5 V sets P_On_Aux to “1”. The state transition P_On_Aux 0
Mode
AUX
Figure
7-6). If V
VAUX
V
VAUX
exceeds 2 V (typically) pin N_RESET is set to low, and
> VS1 + 0.5 V (typ)
IDLE, TX, RX, RX Polling
Mode
V
VAUX
VAUX
> VS1 + 0.5 V (typ)
on pin VAUX must exceed
VSOUT
exceeds 2.38 V
4841A–RKE–02/05
1 generates