CDK2000 Cirrus Logic, Inc., CDK2000 Datasheet - Page 7

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CDK2000

Manufacturer Part Number
CDK2000
Description
Fractional-n Clock Multiplier with Internal LCO
Manufacturer
Cirrus Logic, Inc.
Datasheet
DS844F1
AC ELECTRICAL CHARACTERISTICS
Test Conditions (unless otherwise specified): VD = 3.1 V to 3.5 V; T
C
Notes: 5.
Clock Input Frequency
Clock Input Pulse Width
PLL Clock Output Frequency
PLL Clock Output Duty Cycle
Clock Output Rise Time
Clock Output Fall Time
Period Jitter
Base Band Jitter (100 Hz to 40 kHz)
Wide Band JItter (100 Hz Corner)
PLL Lock Time - CLK_IN
L
= 15 pF.
6. In accordance with AES-12id-2006 section 3.4.2. Measurements are Time Interval Error taken with 3rd
7. In accordance with AES-12id-2006 section 3.4.1. Measurements are Time Interval Error taken with 3rd
8. 1 UI (unit interval) corresponds to t
f
order 100 Hz to 40 kHz bandpass filter.
order 100 Hz Highpass filter.
CLK_OUT
Parameters
= 24.576 MHz; Sample size = 10,000 points; AuxOutSrc[1:0] = 11.
(Note
8)
CLK_IN
Symbol
pw
f
CLK_OUT
f
CLK_IN
CLK_IN
t
t
t
t
t
OD
OR
OF
JIT
LC
or 1/f
CLK_IN
20% to 80% of VD
80% to 20% of VD
Measured at VD/2
f
f
f
f
CLK_IN
CLK_IN
CLK_IN
CLK_IN
Conditions
(Notes 5, 6)
(Notes 5, 7)
.
(Note
A
< 175 kHz
> 175 kHz
< 200 kHz
> 200 kHz
= -10°C to +70°C (Commercial Grade);
5)
50 Hz
Min
140
10
45
6
-
-
-
-
-
-
-
Typ
150
100
1.7
1.7
50
35
50
1
-
-
-
-
CS2300-OTP
Max
200
3.0
3.0
30
75
55
3
-
-
-
-
-
ps rms
ps rms
ps rms
Units
MHz
MHz
ms
ns
ns
ns
ns
%
UI
7

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