WM8144-10 Wolfson Microelectronics Ltd., WM8144-10 Datasheet - Page 15

• Manufacturer Part Number: WM8144-10
• Description: Integrated 10-bit Data Acquisition System For Imaging Applications
• Manufacturer: Wolfson Microelectronics Ltd.

Operational Modes
Video Sampling Options
WM8144-10 can interface to CCD sensors using four
basic modes of operation ( summarised in Table 4). Mode
configurations are controlled by a combination of control
bits and timing applied to MCLK and VMSP pins. The de-
fault operational mode is mode 1: colour with CDS ena-
bled.
Colour mode definition (mode 1)
Figure 12 summarises the timing relationships within the
Colour mode. MCLK is applied at twice the required ADC
conversion rate. Synchronisation of sampling and chan-
nel multiplexing to the incoming video signal is performed
by the VSMP pulse (active high). The three input chan-
nels (R,G,B) are sampled in parallel on the rising edge of
MCLK following a VSMP pulse. The sampled data is mul-
tiplexed into a single data stream at three times the VSMP
rate and passes through the internal pipeline and emerges
on the OP[9:0] bus 20.5 MCLK periods later.
If the digital post-processing stage is activated, compen-
sation data will be clocked into the device at twice the
ADC conversion rate (e.g. two reads per red pixel ). The
first of the two bytes will be required on the CDATA bus
15.5 MCLK periods after the corresponding VSMP pulse.
CC[2:0] can be used to control the three lower address
lines of an external RAM. Both Correlated Double Sam-
pling (CDS) and single sample modes of operation are
available.
Monochrome mode definitions
One input channel is continuously sampled on the rising
edge of MCLK following a VSMP pulse. The user can
specify which input channel (R,G,B) to be sampled by
writing to WM8144-10 internal control registers. There
are three separate monochrome modes with different
maximum sample rates and CDS availability.
Details of Monochrome mode timing (mode 2)
Figure 13 summarises the timing relationships. The tim-
ing in this mode is identical to mode 1 except for the
CC[2:0] outputs. One input channel is sampled three
times ( due to the multiplexer being held in one position)
and passes through the device as three separate sam-
ples. Two of the samples can be ignored at the output.
The CC[2:1] output pins reflect the input channel selected
(R,G or B).
Details of Fast Monochrome mode timing
(mode 3)
Figure 14 summarises the timing relationships. This mode
allows the maximum sample rate to be increased to 4
Wolfson Microelectronics
MSPS. This is achieved by altering the MCLK:VSMP
ratio to 3:1. In this mode, the timing of RS and CL must
be fixed (refer to Table 5).
The sampled video data will pass through the internal
pipeline and emerge on the OP[9:0] bus 29.5 MCLK
periods later.
If the digital post-processing stage is activated com-
pensation data will be clocked into the device at twice
the internal pixel rate (e.g. two reads per red pixel ).
The first of the two bytes will be required on the CDATA
bus 22.5 MCLK periods after the corresponding VSMP
pulse.
Details of Max. Speed Monochrome mode
(mode 4)
Figure 15 summarises the timing relationships. This
mode allows the maximum sample rate to be increased
to 6 MSPS. This is achieved by altering the MCLK:VSMP
ratio to 2:1. The latency through the device is identical
to modes 1 and 2. CDS is not available in this mode.
WM8144-10
15