WM8580AGEFT Wolfson Microelectronics Ltd., WM8580AGEFT Datasheet - Page 78

• Manufacturer Part Number: WM8580AGEFT
• Description: Multichannel Codec with S/pdif Transceiver
• Manufacturer: Wolfson Microelectronics Ltd.

WM8580
w
REGISTER
ADDRESS
PAIF 1
PAIF 2
R10
0Ah
09h
R9
BIT
5:4
2:0
4:3 PAIFRX_BCLKSEL
7:6
2:0
4:3 PAIFTX_BCLKSEL
6
5
5
PAIFRX_RATE
PAIFTX_RATE
CLKSEL_MAN
TX_CLKSEL
PAIFRXMS_
PAIFRXMS
PAIFTXMS
CLKSEL
LABEL
[2:0]
[1:0]
[2:0]
[1:0]
DEFAULT
010
010
01
00
00
00
0
0
0
S/PDIF Transmitter clock source
Clock selection auto-configuration override
Master Mode LRCLK Rate
Master Mode BCLK Rate
PAIF Receiver Master/Slave Mode Select
PAIF Receiver Master Mode clock source
Master Mode LRCLK Rate
Master Mode BCLKRate
PAIF Transmitter Master/Slave Mode Select:
00 = ADCMLCK pin
01 = PLLACLK
10 = PLLBCLK
11 = MCLK pin
0 = auto-configuration enabled, clock configuration follows
restrictions described in page 42 to page 47.
1 = auto-configuration disabled, clock configuration follows
relevant CLKSEL bits in R8 to R11.
000 = 128fs
001 = 192fs
010 = 256fs
011 = 384fs
100 = 512fs
101 = 768fs
110 = 1152fs
00 = 64 BCLKs per LRCLK
01 = 32 BCLKs per LRCLK
10 = 16 BCLKs per LRCLK
11 = BCLK = System Clock
0 = Slave Mode
1 = Master Mode
00 = MCLK pin
01 = PLLACLK
10 = PLLBCLK
11 = MCLK pin
000 = 128fs
001 = 192fs
010 = 256fs
011 = 384fs
100 = 512fs
101 = 768fs
110 = 1152fs
00 = 64 BCLKs per LRCLK
01 = 32 BCLKs per LRCLK
10 = 16 BCLKs per LRCLK
11 = BCLK = System Clock
0 = Slave Mode
1 = Master Mode
DESCRIPTION
PD Rev 4.3 August 2007
Production Data
78