WM8580AGEFT Wolfson Microelectronics Ltd., WM8580AGEFT Datasheet - Page 81

• Manufacturer Part Number: WM8580AGEFT
• Description: Multichannel Codec with S/pdif Transceiver
• Manufacturer: Wolfson Microelectronics Ltd.

Production Data
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REGISTER
ADDRESS
Control 1
Control 2
Control 3
DAC
DAC
DAC
R15
R16
R17
0Fh
10h
11h
BIT
1:0
3:2
5:4
3:0
6:4
2:0
8
7
4
RX2DAC_MODE
DEEMP[2:0]
DEEMPALL
DZFM[2:0]
DAC1SEL
DAC2SEL
DAC3SEL
LABEL
PL[3:0]
[1:0]
[1:0]
[1:0]
IZD
DEFAULT
1001
000
000
00
01
10
0
0
0
DAC digital input select
DAC oversampling rate and power down control (only valid when
DAC_SRC = 00, S/PDIF receiver)
Selects the source for ZFLAG
Infinite zero detection circuit control and automute control
De-emphasis mode select
DEEMP[0] = 1, enable De-emphasis on DAC1
DEEMP[1] = 1, enable De-emphasis on DAC2
DEEMP[2] = 1, enable De-emphasis on DAC3
0 = De-emphasis controlled by DEEMP[2:0]
1 = De-emphasis enabled on all DACs
00 = DAC takes data from DIN1
01 = DAC takes data from DIN2
10 = DAC takes data from DIN3
0 = SFRM_CLK determines oversampling rate, DACs 2/3
powered down
1 = PAIFRX_LRCLK determines oversampling rate, DACs 2/3
source PAIF Receiver
000 - All DACs Zero Flag
001 - DAC1 Zero Flag
010 - DAC2 Zero Flag
011 - DAC3 Zero Flag
100 - ZFLAG = 0
101 - ZFLAG = 0
110 - ZFLAG = 0
111 - ZFLAG = 0
0 = Infinite zero detect automute disabled
1 = Infinite zero detect automute enabled
PL[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
DESCRIPTION
Left O/P
(L+R)/2
(L+R)/2
(L+R)/2
(L+R)/2
Mute
Right
Mute
Right
Mute
Right
Mute
Right
Left
Left
Left
Left
PD Rev 4.3 August 2007
Right O/P
WM8580
(L+R)/2
(L+R)/2
(L+R)/2
(L+R)/2
Right
Right
Right
Right
Mute
Mute
Mute
Mute
Left
Left
Left
Left
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