MAX5874 Maxim Integrated Products, MAX5874 Datasheet - Page 14

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MAX5874

Manufacturer Part Number
MAX5874
Description
Dual DAC with LVDS Inputs
Manufacturer
Maxim Integrated Products
Datasheet

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14-Bit, 200Msps, High-Dynamic-Performance,
Dual DAC with CMOS Inputs
Figure 7. Differential Output Configuration
thus optimizing the DAC’s dynamic performance. Keep
digital signal paths short and run lengths matched to
avoid propagation delay and data skew mismatches.
The MAX5874 requires five separate power-supply inputs
for analog (AV
DV
AV
capacitor as close to the device as possible with the
shortest possible connection to the ground plane (Figure
8). Minimize the analog and digital load capacitances for
optimized operation. Decouple all three power-supply
voltages at the point they enter the PC board with tanta-
lum or electrolytic capacitors. Ferrite beads with addition-
al decoupling capacitors forming a pi-network could also
improve performance.
The analog and digital power-supply inputs AV
AV
ply voltage range. The analog and digital power-supply
inputs AV
supply voltage range.
The MAX5874 is packaged in a 68-pin QFN-EP package,
providing greater design flexibility and optimized DAC
AC performance. The EP enables the use of necessary
grounding techniques to ensure highest performance
operation. Thermal efficiency is not the key factor, since
the MAX5874 features low-power operation. The exposed
pad ensures a solid ground connection between the DAC
and the PC board’s ground layer.
14
DATA13–DATA0
DD
CLK
DD3.3
______________________________________________________________________________________
, DV
, and DV
14
), and clock (AV
DD
DD1.8
, and AV
DD1.8
DD3.3
and DV
MAX5874
GND
and AV
CLK
allow a +3.135V to +3.465V sup-
DD1.8
CLK
input pin with a separate 0.1µF
DD3.3
) circuitry. Decouple each
OUTIP/OUTQP
OUTIN/OUTQN
allow a +1.71V to +1.89V
), digital (DV
25Ω
50Ω
25Ω
DD1.8
DD3.3
OUTP
OUTN
and
,
The data converter die attaches to an EP lead frame with
the back of this frame exposed at the package bottom
surface, facing the PC board side of the package. This
allows for a solid attachment of the package to the PC
board with standard infrared (IR) reflow soldering tech-
niques. A specially created land pattern on the PC board,
matching the size of the EP (6mm x 6mm), ensures the
proper attachment and grounding of the DAC. Refer to
the MAX5875 EV kit data sheet. Designing vias into the
land area and implementing large ground planes in the
PC board design allow for the highest performance oper-
ation of the DAC. Use an array of at least 4 x 4 vias
(≤0.3mm diameter per via hole and 1.2mm pitch between
via holes) for this 68-pin QFN-EP package. Connect the
MAX5874 exposed paddle to GND. Vias connect the
land pattern to internal or external copper planes. Use as
many vias as possible to the ground plane to minimize
inductance.
Figure 8. Recommended Power-Supply Decoupling and
Bypassing Circuitry
*BYPASS EACH POWER-SUPPLY PIN INDIVIDUALLY.
BYPASSING—DAC LEVEL
DATA13–DATA0
14
AV
DV
DD1.8
DD1.8
0.1µF
0.1µF
AV
DV
MAX5874
DD3.3
DD3.3
0.1µF
0.1µF
AV
CLK
OUTIP/OUTQP
OUTIN/OUTQN
0.1µF
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