DM336P Davicom Semiconductor Incorporated, DM336P Datasheet - Page 31

• Manufacturer Part Number: DM336P
• Manufacturer: Davicom Semiconductor Incorporated

DM6380 Pin Description
DM6380 Functional Description
In this chip, we could roughly divide it into two major
parts : digital portion and analog portion. The
functional blocks are described separately in this
section. The analog circuits include a sigma-delta
modulator/demodulator, decimation/interpolation
filters, a speaker driver, low-pass filter and certain
logic circuits. The digital circuits is composed of Tx/Rx
clock generator/PLL, serial port, serial/parallel
conversions and control registers. All the clock
information the analog circuits need should be
provided by the digital clock system since the best
sampling instant of A/D and D/A depends on the
received signal and transmit signals. The data format
of A/D and D/A is 2's complement.
Final
Version: DM336P-DS-F02
August 15, 2000
Pin No.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
6
7
8
9
TXSCLK*2
Pin Name
RXDCLK
RXSCLK
TXDCLK
EXTCLK
/RESET
AGNDR
AGNDT
AVDDR
AVDDT
VREFN
VREFP
DGND
CLKIN
SPKR
SCLK
TXA2
TXA1
RXIN
DOR
DOT
VCM
VDD
RFS
TFS
DIR
DIT
Vr
V.34 Integrated Data/ Fax/Voice/Speakerphone Modem Device Set
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
P
P
P
P
I
I
I
I
I
I
I
I
I
I
Receive Data Clock
Digital Power
Receive Sample Clock
Receive Frame Synchronization
Data Output For Receiver
Data Input For Receiver
Digital Ground
Serial Clock Synchronized With All Serial Data
Data Output For Transmitter
Data Input For Transmitter
Transmit Frame Synchronization
Transmit Sample Clock * 2
Transmit Data Clock
Master Clock Input (20.16MHz = 40.32MHz / 2 )
Codec Reset Input
External Transmit Data Clock
Internal Reference Voltage. Connect 0.1uF to DGND
Analog VDD For The Transmitter Analog Circuitry (+5VDC)
Transmit Negative Analog Output
Transmit Positive Analog Output
Analog Receiver Circuitry Signal Return Path
Negative Reference Voltage, VCM - 1V
Common Mode Voltage Output, 2.5V
Positive Reference Voltage, VCM + 1V
Analog Transmitter Circuitry Signal Return Path
Receive Analog Input
Analog VDD For The Receiver Analog Circuitry (+5VDC)
Speaker Driver
Master clock (FQ) is obtained from an external signal
connected to CLKIN. The different transmit and
receive clocks are obtained by master clock
frequency division in several programmable counters.
The Tx and Rx clocks can be synchronized on
external signals by performing the phase shifts in the
frequency division process. Two independent digital
phase locked loops are implemented using this
principle, one for transmit clock system, the other,
receive clock. The tracking of the transmit clock is
automatically done by the transmit DPLL circuit. The
receive DPLL circuit is controlled by the host
processor and it is actually an adjustable phase
shifter.
Description
DM336P
31