LPC2104 Philips Semiconductors (Acquired by NXP), LPC2104 Datasheet - Page 7

• Manufacturer Part Number: LPC2104
• Description: LPC2104/2105/2106; Single-chip 32-bit Microcontrollers; 128 KB Isp/iap Flash With 64 KB/32 KB/16 KB RAM;; Package: SOT313-2 (LQFP48)
• Manufacturer: Philips Semiconductors (Acquired by NXP)

Philips Semiconductors
Table 3:
9397 750 11499
Product data
Symbol
RTCK
DBGSEL
RST
X1
X2
V
V
V
NC
SS1
DD1.8
DD3
- V
SS4
Pin description
Pin
33
34
38
39
8
9
10
15
16
26
27
6
11
12
7, 19, 31, 43
5
17, 40
4, 20, 25, 42
…continued
Type
I/O
O
I/O
O
I/O
O
I/O
O
I/O
O
I
I/O
O
I
I/O
O
I
I/O
O
I
I/O
I
O
I/O
I
I
I
O
I
I
I
-
Description
P0.23 — Port 0 bit 23.
PIPESTAT0 — Pipeline Status, bit 0. Standard I/O port with internal pull-up.
P0.24 — Port 0 bit 24.
PIPESTAT1 — Pipeline Status, bit 1. Standard I/O port with internal pull-up.
P0.25 — Port 0 bit 25.
PIPESTAT2 — Pipeline Status, bit 2. Standard I/O port with internal pull-up.
P0.26 — Port 0 bit 26.
TRACESYNC — Trace Synchronization Standard I/O port with internal
pull-up.
P0.27 — Port 0 bit 27.
TRACEPKT0 — Trace Packet, bit 0. Standard I/O port with internal pull-up.
TRST — Test Reset for JTAG interface, secondary JTAG pin group.
P0.28 — Port 0 bit 28.
TRACEPKT1 — Trace Packet, bit 1. Standard I/O port with internal pull-up.
TMS — Test Mode Select for JTAG interface, secondary JTAG pin group
P0.29 — Port 0 bit 29.
TRACEPKT2 — Trace Packet, bit 2. Standard I/O port with internal pull-up.
TCK — Test Clock for JTAG interface, secondary JTAG pin group.
P0.30 — Port 0 bit 30.
TRACEPKT3 — Trace Packet, bit 3. Standard I/O port with internal pull-up.
TDI — Test Data In for JTAG interface, secondary JTAG pin group.
P0.31 — Port 0 bit 31.
EXTIN0 — External Trigger Input. Standard I/O port with internal pull-up.
TDO — Test Data out for JTAG interface, secondary JTAG pin group.
Returned Test Clock output: Extra signal added to the JTAG port. Assists
debugger synchronization when processor frequency varies. Also used
during debug mode entry to select primary or secondary JTAG pins with the
48-pin package. Bi-directional pin with internal pull-up.
Debug Select: When LOW, the part operates normally. When HIGH, debug
mode is entered. Input pin with internal pull-down.
External Reset input: A LOW on this pin resets the device, causing I/O ports
and peripherals to take on their default states, and processor execution to
begin at address 0.
Input to the oscillator circuit and internal clock generator circuits.
Output from the oscillator amplifier.
Ground: 0 V reference.
1.8 V Core Power Supply: This is the power supply voltage for internal
circuitry.
3.3 V Pad Power Supply: This is the power supply voltage for the I/O ports.
Not Connected: These pins are not connected in the 48 pin package.
Rev. 02 — 11 June 2003
LPC2104/2105/2106
Single-chip 32-bit microcontrollers
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
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