MCIMX27 Motorola Semiconductor Products, MCIMX27 Datasheet - Page 57
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MCIMX27
Manufacturer Part Number
MCIMX27
Description
Manufacturer
Motorola Semiconductor Products
Datasheet
1.MCIMX27.pdf
(118 pages)
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1
3.5.8.1
The receiver functions correctly up to a FEC_RX_CLK maximum frequency of 25 MHz + 1%. There is
no minimum frequency requirement. In addition, the FEC IPG clock frequency must exceed twice the
FEC_RX_CLK frequency.
Figure 17
3.5.8.2
The transmitter functions correctly up to a FEC_TX_CLK maximum frequency of 25 MHz + 1%. There
is no minimum frequency requirement. In addition, the FEC IPG clock frequency must exceed twice the
FEC_TX_CLK frequency.
Figure 18
Freescale Semiconductor
M1
M2
M3
M4
FEC_RX_DV, FEC_RX_CLK, and FEC_RXD0 have the same timing in 10 Mbps 7-wire interface mode.
FEC_RXD[3:0] (inputs)
ID
FEC_RX_CLK (input)
shows the MII receive signal timings, and
shows the MII transmit signal timings, and
FEC_RX_ER
FEC_RX_DV
FEC_RXD[3:0], FEC_RX_DV, FEC_RX_ER to FEC_RX_CLK
setup
FEC_RX_CLK to FEC_RXD[3:0], FEC_RX_DV, FEC_RX_ER
hold
FEC_RX_CLK pulse width high
FEC_RX_CLK pulse width low
MII Receive Signal Timing (FEC_RXD[3:0], FEC_RX_DV, FEC_RX_ER,
and FEC_RX_CLK)
MII Transmit Signal Timing (FEC_TXD[3:0], FEC_TX_EN, FEC_TX_ER,
and FEC_TX_CLK)
Table 24. MII Receive Signal Timing Parameters
Figure 17. MII Receive Signal Timing Diagram
i.MX27 Data Sheet, Advance Information, Rev. 0.1
Preliminary—Subject to Change Without Notice
Parameter
M1
1
M2
M3
Table 24
Table 25
lists the timing parameters.
lists the timing parameters.
35%
35%
Min
M4
5
5
Max
65%
65%
—
—
FEC_RX_CLK period
FEC_RX_CLK period
Signal Descriptions
Unit
ns
ns
57