MCIMX27 Motorola Semiconductor Products, MCIMX27 Datasheet - Page 84

• Manufacturer Part Number: MCIMX27
• Manufacturer: Motorola Semiconductor Products

Signal Descriptions
3.5.17.2
Figure 46
parameters.
84
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All the timings for the SSI are given for a non-inverted serial clock polarity (TSCKP/RSCKP = 0)
and a non-inverted frame sync (TFSI/RFSI = 0). If the polarity of the clock and/or the frame sync
have been inverted, all the timing remains valid by inverting the clock signal STCK/SRCK and/or
the frame sync STFS/SRFS shown in the tables and in the figures.
All timings are on AUDMUX pads when SSI is being used for data transfer.
“Tx” and “Rx” refer to the Transmit and Receive sections of the SSI.
For internal Frame Sync operation using external clock, the FS timing will be same as that of Tx
Data (for example, during AC97 mode of operation).
and
Synchronous Internal Clock Operation
SS42
SS43
SS52
SSI Receiver Timing with Internal Clock
ID
Figure 47
AD1_TXFS (wl)
Table 45. SSI Transmitter with Internal Clock Timing Parameters (continued)
AD1_TXFS (bl)
(Output)
(Output)
AD1_RXD
(Input)
AD1_TXC
(Output)
(Output)
AD1_RXC
SRXD setup before (Tx) CK falling
SRXD hold after (Tx) CK falling
Loading
Figure 46. SSI Receiver with Internal Clock Timing Diagram
show the SSI receiver timing with internal clock, and
SS48
SS2
SS7
i.MX27 Data Sheet, Advance Information, Rev. 0.1
Preliminary—Subject to Change Without Notice
Parameter
SS47
SS1
SS11
SS9
SS20
SS51
SS5
SS4
SS50
SS21
10.0
Min
0
SS49
SS3
Table 46
Max
25
—
—
Freescale Semiconductor
SS13
lists the timing
Unit
ns
ns
pF