PIC10F200 Microchip Technology, Inc., PIC10F200 Datasheet - Page 24

• Manufacturer Part Number: PIC10F200
• Description: 6-Pin, 8-Bit Flash Microcontrollersfeatures 6-pin SOT-23 Packaging Precision 4 MHZ Internal Oscillator Baseline Core With 33 Instructions, 2 Stack Levels All Single-cycle Instructions Except For Program Branches Which Are Two Cycles 12-bit Wide
• Manufacturer: Microchip Technology, Inc.

PIC10F200/202/204/206
4.7
As a program instruction is executed, the Program
Counter (PC) will contain the address of the next
program instruction to be executed. The PC value is
increased by one every instruction cycle, unless an
instruction changes the PC.
For a GOTO instruction, bits 8:0 of the PC are provided
by the GOTO instruction word. The Program Counter
(PCL) is mapped to PC<7:0>.
For a CALL instruction, or any instruction where the
PCL is the destination, bits 7:0 of the PC again are pro-
vided by the instruction word. However, PC<8> does
not come from the instruction word, but is always
cleared (Figure 4-5).
Instructions where the PCL is the destination, or modify
PCL instructions, include MOVWF PC, ADDWF PC and
BSF PC,5.
FIGURE 4-5:
DS41239A-page 22
GOTO Instruction
CALL or Modify PCL Instruction
Note:
Program Counter
Because PC<8> is cleared in the CALL
instruction or any modify PCL instruction,
all subroutine calls or computed jumps are
limited to the first 256 locations of any
program memory page (512 words long).
PC
PC
Reset to ‘0’
8 7
8 7
LOADING OF PC
BRANCH INSTRUCTIONS
Instruction Word
Instruction Word
PCL
PCL
0
0
Preliminary
incremented by one, into Stack Level 1. If more than two
4.7.1
The PC is set upon a Reset, which means that the PC
addresses the last location in program memory (i.e.,
the oscillator calibration instruction). After executing
MOVLW XX, the PC will roll over to location 0000h and
begin executing user code.
4.8
The PIC10F200/204 devices have a 2-deep, 8-bit wide
hardware PUSH/POP stack.
The PIC10F202/206 devices have a 2-deep, 9-bit wide
hardware PUSH/POP stack.
A CALL instruction will PUSH the current value of Stack 1
into Stack 2 and then PUSH the current PC value,
sequential CALLs are executed, only the most recent two
return addresses are stored.
A RETLW instruction will POP the contents of Stack
Level 1 into the PC and then copy Stack Level 2
contents into level 1. If more than two sequential
RETLWs are executed, the stack will be filled with the
address previously stored in Stack Level 2. Note that
the W register will be loaded with the literal value
specified in the instruction. This is particularly useful for
the implementation of data look-up tables within the
program memory.
Note 1: There are no Status bits to indicate stack
2: There are no instruction mnemonics
Stack
EFFECTS OF RESET
overflows or stack underflow conditions.
called PUSH or POP. These are actions
that occur from the execution of the CALL
and RETLW instructions.
 2004 Microchip Technology Inc.