PIC10F200 Microchip Technology, Inc., PIC10F200 Datasheet - Page 57

• Manufacturer Part Number: PIC10F200
• Description: 6-Pin, 8-Bit Flash Microcontrollersfeatures 6-pin SOT-23 Packaging Precision 4 MHZ Internal Oscillator Baseline Core With 33 Instructions, 2 Stack Levels All Single-cycle Instructions Except For Program Branches Which Are Two Cycles 12-bit Wide
• Manufacturer: Microchip Technology, Inc.

DECF
Syntax:
Operands:
Operation:
Status Affected: Z
Description:
DECFSZ
Syntax:
Operands:
Operation:
Status Affected: None
Description:
GOTO
Syntax:
Operands:
Operation:
Status Affected: None
Description:
 2004 Microchip Technology Inc.
Decrement f
[ label ] DECF f,d
0
d
(f) – 1
Decrement register ‘f’. If ‘d’ is ‘0’,
the result is stored in the W
register. If ‘d’ is ‘1’, the result is
stored back in register ‘f’.
Decrement f, Skip if 0
[ label ] DECFSZ f,d
0
d
(f) – 1
The contents of register ‘f’ are
decremented. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
If the result is ‘0’, the next instruc-
tion, which is already fetched, is
discarded and a NOP is executed
instead making it a two-cycle
instruction.
Unconditional Branch
[ label ]
0
k
Status<6:5>
GOTO is an unconditional branch.
The 9-bit immediate value is
loaded into PC bits <8:0>. The
upper bits of PC are loaded from
Status<6:5>. GOTO is a two-cycle
instruction.
f
f
k
[0,1]
[0,1]
PC<8:0>;
31
31
511
(dest)
d;
GOTO k
skip if result = 0
PC<10:9>
Preliminary
PIC10F200/202/204/206
INCF
Syntax:
Operands:
Operation:
Status Affected: Z
Description:
INCFSZ
Syntax:
Operands:
Operation:
Status Affected: None
Description:
IORLW
Syntax:
Operands:
Operation:
Status Affected: Z
Description:
Increment f
[ label ]
0
d
(f) + 1
The contents of register ‘f’ are
incremented. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
[ label ]
0
d
(f) + 1
The contents of register ‘f’ are
incremented. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
If the result is ‘0’, then the next
instruction, which is already
fetched, is discarded and a NOP is
executed instead making it a
two-cycle instruction.
Inclusive OR literal with W
[ label ]
0
(W) .OR. (k)
The contents of the W register are
OR’ed with the eight bit literal ‘k’.
The result is placed in the W
register.
Increment f, Skip if 0
f
f
k
[0,1]
[0,1]
31
31
255
(dest)
(dest), skip if result = 0
INCF f,d
INCFSZ f,d
IORLW k
(W)
DS41239A-page 55