AD1985 Analog Devices, AD1985 Datasheet - Page 36

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AD1985

Manufacturer Part Number
AD1985
Description
AC'97 2.3 Soundmax Codec W/jack Sensing
Manufacturer
Analog Devices
Datasheet

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AD1985
Jack Sense/Audio Interrupt/Status Register (Index 0x72)
Reg Num Name
0x72
Note: All register bits are read/write except for JS0ST and JS1ST, which are read-only.
JS0INT
JS1INT
JS0ST
JS1ST
JS0MD
JS1MD
JS0TMR
JS1TMR
JS0EQB
JS1EQB
JSMT[2:0]
JS0DMX
JS1DMX
JSSPRD
JACK SENSE
Indicates Pin JS0 has generated an interrupt. Remains set until the software services the JS0 interrupt; i.e., JS0 ISR should
clear this bit by writing a 0 to it.
Notes:
1) Interrupts are generated by valid state changes of JS pins.
2) Interrupt to the system is actually an OR combination of this bit and JS3–JS0 INT.
3) The interrupt implementation path is selected by the INTS bit (Register 0x74).
4) It is also possible to generate a software system interrupt by writing a 1 to this bit.
Indicates Pin JS1 has generated an interrupt. Remains set until the software services the JS1 interrupt; i.e., JS1 ISR should
clear this bit by writing a 0 to it. See JS0INT description above for additional details.
JS0 STATE. This bit always reports the logic state of the JS0 pin.
Cannot be used for MIC sensing.
JS1 STATE. This bit always reports the logic state of the JS1 pin.
Cannot be used for MIC sensing.
JS0 MODE. This bit selects the operation mode for the JS0 pin.
0: Jack Sense Mode (reset default).
1: Interrupt Mode.
JS1 MODE: This bit selects the operation mode for the JS1 pin.
0: Jack Sense Mode (reset default).
1: Interrupt Mode.
JS0 Timer Enable. If this bit is set to a 1, JS0 must be high for greater than 298 ms to be recognized.
JS1 Timer Enable. If this bit is set to a 1, JS1 must be high for greater than 298 ms to be recognized.
JS0 EQ Bypass Enable. This bit enables JS0 to control the EQ bypass.
When this bit is set to 1, JS0 = 1 will cause the EQ to be bypassed. Default is 0.
JS1 EQ Bypass Enable. This bit enables JS1 to control the EQ bypass.
When this bit is set to 1, JS1 = 1 will cause the EQ to be bypassed. Default is 0.
JS Mute Enable Selector. These three bits select and enable the Jack Sense muting action (see following table).
JS0 Down-Mix Control Enable. This bit enables JS0 to control the Down-Mix function. This function allows a digital mix of
6-channel audio into 2-channel audio. The mix can then be routed to the stereo LINE_OUT or HP_OUT jacks. When this bit
is set to 1, JS0 = 1 will activate the Down-Mix conversion.
See the DMIX description in Register 0x76. The DMIX bits select the Down-Mix implementation type and can also force the
function to be activated.
JS1 Down-Mix Control Enable. This bit enables JS1 to control the Down-Mix function (see JS0DMX description above).
When this bit is set to 1, JS1 = 1 will activate the Down-Mix conversion.
JS Spread Control Enable. This bit enables 2-channel to 6-channel audio Spread function when both Jack Senses are active
(logic state 1). Note that the SPRD bit can also force the Spread function without being gated by the Jack Senses. See this
bit’s description in Register 0x76 for more details on the Spread function.
D15
JS1
SPRD
D14
JS1
DMX
D13 D12 D11 D10 D9
JS0
DMX
JS
MT2
JS
MT1
Rev. 0 | Page 36 of 48
JS
MT0
JS1
EQB
D8
JS0
EQB
D7
JS1
TMR
D6
JS0
TMR
D5
JS1
MD
D4
JS0
MD
D3
JS1
ST
D2 D1
JS0
ST
JS1
INT
D0 Default
JS0
INT
N/A

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