ADSP-TS101S Analog Devices, ADSP-TS101S Datasheet - Page 14

• Manufacturer Part Number: ADSP-TS101S
• Description: Embedded Processor
• Manufacturer: Analog Devices

ADSP-TS101S
Table 6. Pin Definitions—External Port Arbitration (continued)
1
2
3
Table 7. Pin Definitions—External Port DMA/Flyby
1
2
Signal
HBG
CPA
DPA
Type column symbols: A = Asynchronous; G = Ground; I = Input; O = Output; o/d = Open drain output; P = Power supply;
pd = Internal pull-down approximately 100 k ; pu = Internal pull-up approximately 100 k ; T = Three-state
Term (for termination) column symbols: epd = External pull-down approximately 10 k to V
nc = Not connected; au = Always used.
The internal pull-down may not be sufficient. A stronger pull-down may be necessary.
See
The internal pull-up may not be sufficient. A stronger pull-up may be necessary.
Signal
DMAR3–0
FLYBY
IOEN
Type column symbols: A = Asynchronous; G = Ground; I = Input; O = Output; o/d = Open drain output; P = Power supply;
pd = Internal pull-down approximately 100 k ; pu = Internal pull-up approximately 100 k ; T = Three-state
Term (for termination) column symbols: epd = External pull-down approximately 10 k to V
nc = Not connected; au = Always used.
The internal pull-up may not be sufficient. A stronger pull-up may be necessary.
See
ELECTRICAL CHARACTERISTICS on Page 19
ELECTRICAL CHARACTERISTICS on Page 19
3
1
1
Type
I/O/T
(pu
I/O (o/d)
I/O (o/d)
Type
I/A
O/T (pu
O/T (pu
2
)
2
2
)
)
Term
nc
See
next
col.
See
next
col.
Term
epu
nc
nc
Description
Host Bus Grant. Acknowledges HBR and indicates that the host can take
control of the external bus. When relinquishing the bus, the master DSP
three-states the ADDR31–0, DATA63–0, MSH, MSSD, MS1–0, RD, WRL,
WRH, BMS, BRST, FLYBY, IOEN, RAS, CAS, SDWE, SDA10, SDCKE,
LDQM and HDQM pins, and the DSP puts the SDRAM in self-refresh mode.
The DSP asserts HBG until the host deasserts HBR. In multiprocessor
systems, the current bus master DSP drives HBG, and all slave DSPs monitor
HBG.
Core Priority Access. Asserted while the DSP’s core accesses external memory.
This pin enables a slave DSP to interrupt a master DSP’s background DMA
transfers and gain control of the external bus for core-initiated transactions.
CPA is an open drain output, connected to all DSPs in the system. The CPA
pin has an internal 500
with ID2–0 = 0. If ID0 is not used, terminate this pin as either epu or nc. If
ID7–1 is not used, terminate this pin as epu.
DMA Priority Access. Asserted while a high priority DSP DMA channel
accesses external memory. This pin enables a high priority DMA channel on
a slave DSP to interrupt transfers of a normal priority DMA channel on a
master DSP and gain control of the external bus for DMA-initiated transac-
tions. DPA is an open drain output, connected to all DSPs in the system. The
DPA pin has an internal 500
DSP with ID2–0 = 0. If ID0 is not used, terminate this pin as either epu or
nc. If ID7–1 is not used, terminate this pin as epu.
Description
DMA Request Pins. Enable external I/O devices to request DMA services
from the DSP. In response to DMARx, the DSP performs DMA transfers
according to the DMA channel’s initialization. The DSP ignores DMA
requests from uninitialized channels.
Flyby Mode. When a DSP DMA channel is initiated in FLYBY mode, it
generates flyby transactions on the external bus. During flyby transactions, the
DSP asserts FLYBY, which signals the source or destination I/O device to
latch the next data or strobe the current data, respectively, and to prepare for
the next data on the next cycle.
I/O Device Output Enable. Enables the output buffers of an external I/O device
for flyby transactions between the device and external memory. Active on flyby
transactions.
for maximum and minimum current consumption for pull-up and pull-down resistances.
for maximum and minimum current consumption for pull-up and pull-down resistances.
–14–
pull-up resistor, which is only enabled on the DSP
SS
SS
; epu = External pull-up approximately 10 k to V
; epu = External pull-up approximately 10 k to V
pull-up resistor, which is only enabled on the
DD-IO
DD-IO
REV. A