LFECP40 Lattice Semiconductor, LFECP40 Datasheet - Page 54

• Manufacturer Part Number: LFECP40
• Description: (LFEC Series) LatticeECP/EC Family Data Sheet
• Manufacturer: Lattice Semiconductor

Lattice Semiconductor
EBR Memory Timing Diagrams
Figure 3-9. Read/Write Mode (Normal)
Note: Input data and address are registered at the positive edge of the clock and output data appears after the positive edge of the clock.
Figure 3-10. Read/Write Mode with Input and Output Registers
CLKA
DOA (Regs)
WEA
DOA
CSA
ADA
DIA
CLKA
WEA
DOA
ADA
CSA
DIA
t
SU
D0
A0
Mem(n) data from previous read
t
t
H
SU
A0
D0
t
H
Mem(n) data from previous read
D1
A1
A1
D1
DOA
3-18
output is only updated during a read cycle
A0
A0
t
ACCESS
DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
D0
D0
A1
A1
t
ACCESS
D0
D1
D1
A0
A0
t
ACCESS
t
ACCESS
D1
D0
D0