AD8364-EVAL Analog Devices, AD8364-EVAL Datasheet
AD8364-EVAL
Related parts for AD8364-EVAL
AD8364-EVAL Summary of contents
Page 1
... When one channel is slaved off the other, controlling the voltage at VLVL will adjust the slaved channel’s RMS value power level offset is desired. The AD8364 is supplied in a 32-lead 5x5mm LFCSP package, for the operating temperature of –40 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. ...
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... A INH[A,B] -40°C<T <85° -10dBm, -40dBm A INH[A,B] 5.5dB Peak-to-RMS Ratio (WCDMA 1 Channel) 12dB Peak-to-RMS Ratio (WCDMA 3 Channels) 18dB Peak-to-RMS Ratio (WCDMA 4 Channels) Rev. PrC Ι Page AD8364 = Chan B , VLVL = VREF, FREQ FREQ Min Typ Max Units LF 2 ...
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... OUTB = OUTB ± INHB PINHB ± -50dBm, OUTA = OUTA INHA PINHA INHA/INLA, INHB/INLB Differential Drive INHA/INLA, INHB/INLB Single-ended Drive With Recommended Balun Rev. PrC Ι Page AD8364 = Chan B , VLVL = VREF, FREQ FREQ Min Typ Max Units 30 dB ...
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... C, Balun = M/A-Com ETC 1.6-4-2-3 A Pins OUT[A, -40 C < T < + -40 C < T < + ±1dB Error ±1dB Error Rev. PrC Ι Page AD8364 = Chan B , VLVL = VREF, FREQ FREQ Min Typ Max Units dBm -62 dBm ...
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... C < T < + -40 C < T < + ±1dB Error ±1dB Error Pins OUT[A, -10dBm INH[A,B] Pins OUT[A, -40dBm INH[A,B] Rev. PrC Ι Page AD8364 = Chan B , VLVL = VREF, FREQ FREQ Min Typ Max Units 50 mV/dB -58 dBm TBD 2.3 TBD V TBD ...
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... INH[A,B] Pins OUT[A, -40dBm INH[A,B] Deviation from OUT[A,B] @ 25°C -40°C<T <85° -10dBm A INH[A,B] -40°C<T <85° -25dBm A INH[A,B] -40°C<T <85° -40dBm A INH[A,B] Rev. PrC Ι Page AD8364 = Chan B , VLVL = VREF, FREQ FREQ Min Typ Max Units +/- 0.5 dB +/- 0.5 dB +/- 0.5 dB +/- 0.3 dB +/- 0.3 dB +/- 0.3 ...
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... C L ≤ 300pF C L ≤ 100KHz CLPF = 1000pF, f SPOT OUTB=OUTA=open, OUTP=FBKA=open, VLVL=open Pin VLVL OUT[P,N]=FBK[A,B} (through Cap) OUT[P,N]=FBK[A,B} (through Cap) Rev. PrC Ι Page AD8364 = Chan B , VLVL = VREF, FREQ FREQ Min Typ Max Units +/- 0.3 dB +/- 0.3 dB +/- 0 ...
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... dBm LPA/B HPA/B PWDN HI to OUTA/OUTB at 10% final value, C =Open, C =10nF dBm LPA/B HPA/B Pin VPS[A,B], VPSR -55 dBm, Vs =5V PWDN enabled, Vs =5V Rev. PrC Ι Page AD8364 = Chan B , VLVL = VREF, FREQ FREQ Min Typ Max Units 0 2.5 V < ...
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... C. section of this specification is not implied. Exposure to absolute -40° +85° C maximum rating conditions for extended periods may affect -65° +150° C device reliability. +300° C Rev. PrC Ι Page AD8364 ...
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... Connect to common via a capacitor to determine 3 dB point of Channel A input signal high-pass filter. 26, 27 INHA, INLA Channel A “High” and “Low” RF signal input terminal. 28 PWDN Disable/Enable control input. Apply logic high voltage to shut AD8364 down. 30, 31 INLB, INHB Channel B “Low” and “High” RF signal input terminal. Under Exposed ...
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... Pin (dBm) and Log Conformance vs. Input Amplitude at 2.5 GHz, Typical OUT Device, T =1.14V , Sine Wave, Differential Drive ADJA/B 100 MHz 2700 MHz Figure 8. Differential Input Impedance (S11) vs. Frequency AD8364 2.5 2 1.5 1 0.5 0 -0.5 -1 -1.5 -2 -2.5 - 2.5 2 1 ...
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... A input swept, Typical Device, T ADJA -20 -15 - =0.75V, Sine Wave, Normalization vs. Input Amplitude for 10 Devices, Frequency=450 MHz, T ADJA/B Rev. PrC Ι Page AD8364 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 Pin (dBm) and Log Conformance vs ...
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... Figure 19. V dB, and -1 dB and phase balance of 0 deg, ±5 deg, ±15 deg at 450 MHz, Typical Device, = 0.75V, Sine Wave, ADJA/B -20 -15 - 1.02V , Sine Wave, ADJA/B Rev. PrC Ι Page AD8364 2 1.5 1 0.5 0 -0.5 -1 -1.5 -2 -65 -60 -55 -50 -45 -40 -35 ...
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... Figure 25. Distribution of TEMP voltage for 40 Devices -10 -15 -20 -40 -30 -20 -10 0 Figure 26. Change in VREF vs. Temperature, 11 parts Rev. PrC Ι Page AD8364 TOTAL = 40 DEVICES RF INPUT = -60 dBm 2.494 2.496 2.498 2.5 2.502 2.504 2.506 VREF (VOLTS) 0.621 0.623 0.625 0.627 TEMP (VOLTS) 10 ...
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... CHANNEL VOUT CW ERROR -0.5 1 CHANNEL ERROR 3 CHANNEL ERROR -1 4 CHANNEL ERROR 11 CHANNEL ERROR -1 1 VOUT 0.5 1 CHANNEL VOUT 3 CHANNEL VOUT 0 4 CHANNEL VOUT CW ERROR -0.5 1 CHANNEL ERROR 3 CHANNEL ERROR -1 4 CHANNEL ERROR -1 Rev. PrC Ι Page AD8364 ...
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... COMB ADJB ADJA DECB Figure 29. Block Diagram A single channel of the AD8364 consists of a high performance AGC loop. Referring to figure 30, the AGC loop is comprised of a wide bandwidth variable gain amplifier (VGA), square law detectors, Amplitude Target circuit, and output driver. detailed description of the functional blocks, see AD8362 data sheet. ...
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... RMS value determined by VSTA or VSTB. RF Input interface The AD8364’s RF inputs are connected as shown in figure 31. There are 100Ω resistors connected between DEC[A,B] and INH[A,B] and INL[A,B]. The mid-point is wired to a pin called DEC[A,B]. Internally to the IC, the DC level on DEC[A,B] is established as (7*VPS[A,B] + 55*Vbe)/30 ...
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... PRELIMINARY TECHNICAL DATA OUT[A,B,P,N] Outputs The output drivers used in the AD8364 are different than the output stage on the AD8362. The AD8364 incorporates rail-to- rail output drivers with pull-up and pull-down capability. OUT[A,B,P,N] can source and sink up 70mA. There is also an internal load from both OUTA and OUTB to ACOM of 2.5KΩ. ...
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... Operation at high slopes is useful when a particular sub-range of the input is measured in greater detail. However, a measurement range would correspond change in VOUT at this slope, exceeding the capacity of the AD8364’s output stage when operating supply. This requires that the intercept is repositioned to place the desired sub-range within a window corresponding to an output range of 0.2 V ≤ ...
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... Figure 35. Scheme Providing 100 mV/dB Slope for Operation over 300 mV Input Range CHOOSING THE RIGHT VALUE FOR CHPF AND CLPF The AD8364’s variable gain amplifier includes an offset cancellation loop, which introduces a high-pass filter effect in its transfer function. The corner frequency, f ...
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... Table 5 Evaluation Board Configuration Options Component Function/Notes T1, T2 The dynamic range of the AD8364 is directly related to the magnitude and phase balance of the Balun feeding the RF signal to the part. The evaluation board includes M/A-COM MABAES0031 solderd to the board and two unsoldered M/A-COM ETC1.6-4-2-3. The MABAES0031 has good magnitude and phase balance between 10MHz and 500MHz, then slowly degrades above 500MHz ...
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... OUTB 10 R12 0 A VSTB 9 B R14 SW3 R13 open open VREF 7 8 C16 C17 R15 0.1uF 0 0.1uF C18 tbd A B REF LEVEL VOLTAGE J11 AD8364 SETPOINT VOLTAGE A J5 OUTPUT VOLTAGE A J6 DIFF OUT + J7 DIFF OUT - J8 OUTPUT VOLTAGE B J9 SETPOINT VOLTAGE B J10 ...
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... PRELIMINARY TECHNICAL DATA Figure 37. Package ORDERING GUIDE Model Temperature Range AD8364XCP −40°C to +85°C AD8364-EVAL Package Description 32-Lead LFCSP Evaluation Board Rev. PrC Ι Page AD8364 Package Option ...