AD8364-EVAL Analog Devices, AD8364-EVAL Datasheet - Page 17

• Manufacturer Part Number: AD8364-EVAL
• Description: LF to 2.7GHz, Dual 60dB TruPwr Detector
• Manufacturer: Analog Devices

PRELIMINARY TECHNICAL DATA
using a resistor divider from OUT[A,B] to drive VST[A,B].
The intercept, V
signal. This is the extrapolated intercept since OUT[A,B] does
not measure down to 0V.
In most applications, the AGC loop is closed through the set
point interface, VST[A,B]. In measurement mode, OUT[A,B]
is tied to VST[A,B], respectively. In controller mode, a control
voltage is applied to VST[A,B]. Pins OUT[A,B] drive the
control input of a system. The RF feedback signal to the input
pins is forced to have an RMS value determined by VSTA or
VSTB.
RF Input interface
The AD8364’s RF inputs are connected as shown in figure 31.
There are 100Ω resistors connected between DEC[A,B] and
INH[A,B] and INL[A,B]. The mid-point is wired to a pin called
DEC[A,B]. Internally to the IC, the DC level on DEC[A,B] is
established as (7*VPS[A,B] + 55*Vbe)/30. With a 5V supply,
DEC[A,B] is at about 2.6V.
Signal coupling capacitors must be connected from the input
signal to the INH[A,B] and INL[A,B] pins. The high-pass corner
is found as:
A decoupling capacitor should be connected from DEC[A,B] to
ground to attenuate any signal at the mid-point. A 100pF and
0.1 F cap from DEC[A,B] to ground are recommended with a
1nF coupling capacitor such that signals above 1.6MHz can be
measured. For coupling of signals below 1.6MHz, a good rule of
thumb would be to use 100*C
Offset Compensation
An offset-nulling loop is used to address small DC offsets in the
VGA. The high-pass corner frequency of this loop is internally
preset to about 1 MHz using an on chip capacitor of 25pF
DEC[A,B]
INH[A,B]
INL[A,B]
Z
, is approximately 316
f
high-pass
Figure 31. AD8364 RF Inputs
COMM
VPOS
V
= 1/(2*π*100*C)
IN
COMM
VPOS
coupling
COMM
for the DEC[A,B] capacitor.
µ
V (-70 dBV) with a CW
(8)
VPOS
VGA
Rev. PrC Ι Page 17 of 23
(1/(2*π*5KΩ*25pF)), sufficiently low for most HF
applications. The high pass corner can be reduced by a
capacitor from CHP[A,B] to ground. The input offset
voltage varies depending on the actual gain at which the
VGA is operating, and thus, on the input signal amplitude.
When an excessively large value of C
correction process may lag the more rapid changes in the
VGA’s gain, which may increase the time required for the
loop to fully settle for a given steady input amplitude.
Temperature Sensor Interface
The AD8364 provides a temperature sensor output capable
of driving about 1.6 mA. A 330Ω internal resistor is
connected from TEMP to COMR to provide current sink
capability. The temperature scaling factor of the output
voltage is approximately 2mV/
voltage at 27
VREF Interface
An internal voltage reference is provided to the user at pin
VREF. The VREF voltage is a temperature stable 2.5V
reference that can drive about 18mA. An 830Ω internal
resistor is connected from VREF to ACOM for 6mA sink
capability.
Power Down Interface
The operating and stand-by currents for the AD8364 at 27°C
are approximately 72 mA and 500 µA respectively; The
PWDN pin is connected to an internal resistor divider made
with two 42KΩ resistors. The divider voltage is applied to
the base of an npn transistor to force a power down
condition when the device is active. Typically when PWDN
is pulled greater than 1.6V the device is powered down.
Figure 22 shows typical response times for various RF input
levels. The output reaches to within 0.1 dB of its steady-state
value in about 1.6 µs; the reference voltage is available to full
accuracy in a much shorter time. This “wake-up” response
will vary in detail depending on the input coupling means
and the capacitances C
result are for a measurement system operating in the 0.8 to
2 GHz range, balun-coupled at the input port, with C
= 100 nF, C
VST[A,B] Interface
The VST[A,B] interface has a high input impedance of
72KΩ. The voltage at VST[A,B] is converted to an internal
current used to steer the VGA gain. The VGA attenuation
control is set to 20 dB/V.
HP[A,B]
o
C is about 630 mV.
= Open and C
DEC[A,B]
, C
o
LP[A,B]
HP[A,B]
C. The typical absolute
HP[A,B]
= Open.
and C
AD8364
is used, the offset
LP[A,B]
; these
DEC[A,B]