Q2686 Wavecom, Q2686 Datasheet - Page 32

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Q2686

Manufacturer Part Number
Q2686
Description
Wireless CPU
Manufacturer
Wavecom
Datasheet

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SPI1-CLK
SPI1-IO
SPI1-I
~SPI1-CS
~SPI2-CS
SPI2-CLK
Data-OUT delay Data out ready delay time
3.4.1.2
For the 4-wire configuration, SPIx-I/O is used as output only, SPIx-I is used as input only.
For the 3-wire configuration, SPIx-I/O is used as input and output.
3.4.1.3
For Open drain, 2V8 and 1V8 voltage characteristics and Reset state definition, refer to Chapter
3.3, "Electrical information for digital I/O".
3.4.1.4
See Chapter 3.3 “Electrical information for digital I/O” for Open drain, 2V8 and 1V8 voltage
characteristics and Reset state definition.
Data-OUT-hold
SPI2-IO
Operation Maximum
This document is the sole and exclusive property of WAVECOM. Not to be distributed or divulged without
prior written agreement.
WM_PRJ_Q2686_PTS_001-007
Data-IN-setup
Signal
Signal
SP2-I
Master
CLK-cycle
Signal
SPI Configuration
SPI1 Bus
SPI2 Bus
number
number
Pin
13 Mb/s
26
27
29
28
Pin
23
25
24
22
Speed
confidential ©
SPI clock frequency
I/O
I/O
Data out hold time
Data in setup time
I/O
I/O
O
O
O
O
I
I
0,1,2,3
Description
Mode
SPI-
type
2V8
2V8
2V8
2V8
type
2V8
2V8
2V8
2V8
I/O
I/O
AC characteristics
Pin description
Pin description
Duplex
Reset
state
Reset
state
Half
Z
Z
Z
Z
Z
Z
Z
Z
SPI Serial Clock
SPI Serial input/output
SPI Serial input
SPI Enable
SPI Serial Clock
SPI Serial input/output
SPI Serial input
SPI Enable
SPIx-CLK; SPIx-
IO; ~SPIx-CS
3-wire type
Minimum
0.1015
Description
Description
2
2
Q2686 Wireless CPU
Typ
SPIx-CLK; SPIx-IO;
SPIx-I; ~SPIx-CS
Maximum Unit
4-wire type
13
10
Multiplexed
Multiplexed
GPIO32
GPIO33
GPIO34
GPIO35
Interfaces
GPIO28
GPIO29
GPIO30
GPIO31
with
with
March 6, 2007
MHz
Page: 31 / 87
ns
ns
ns
®

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