AMBE-1000 Digital Voice Systems, Inc., AMBE-1000 Datasheet - Page 19

• Manufacturer Part Number: AMBE-1000
• Manufacturer: Digital Voice Systems, Inc.

3.3
CHP_WRN
CHP_SEL1
CHP_SEL2
CHP_RDN
CHP_OBE
CHP_IBF
CHP_D7
CHP_D6
CHP_D5
CHP_D4
CHP_D3
CHP_D2
CHP_D1
CHP_D0
The AMBE-1000 is not recommended for new designs.
Symbol
DPE
EPR
Pin
Please refer to the AMBE-2000/2020 product line.
Parallel Mode
The signals in Table 3-B make up the parallel channel interface. Remember that in
parallel channel mode the only available data format is framed, as shown in Table 3-A.
The framed format consists of 272 bits being output from the encoder and input to the
decoder over each 20 milliseconds.
milliseconds the hardware interfacing to the AMBE-1000 has to perform 34 reads and
34 writes, regardless of the voice coding rate.
asynchronously to any clocks.
Table 3-B Channel Parallel Interface Pin Descriptions
(see Table 3-A)
(see Table 3-A)
Bi-directional
Bi-directional
Bi-directional
Bi-directional
Bi-directional
Bi-directional
Bi-directional
Bi-directional
Selectable
Selectable
Direction
In/Out
In/Out
The AMBE-1000 is not recommended for new designs.
Out
Out
Out
Out
Pin
In
In
Please refer to the AMBE-2000/2020 product line.
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Number
Pin
46
47
64
65
61
63
68
69
52
53
54
55
57
58
59
60
page 19
Description
Encoder Packet Ready : This output signal will go high once
every 20 milliseconds to indicate that the encoder has a frame of
data to output.
CHP_RDN.
Decoder Packet Empty : This output signal will go high once
every 20 milliseconds to indicate that the decoder is ready to
accept another frame of data. It will return low some time after
the first CHP_WRN.
Read Data Strobe : In active mode, the rising edge of this output
indicates when the data coming from the AMBE-1000 should be
latched. In passive mode, the falling edge of this signal brings the
next data value to the bus.
Write Data Strobe : In active mode the falling edge of this signal;
indicates when the next data value should be driven on the bus by
external hardware.
edge of this signal indicates when the AMBE-1000 latches the data.
Output Buffer Empty : This signal will go active high after each
read (CHP_RDN) of the parallel port. The port is ready to be read
again when this signal returns low. CHP_OBE can effectively be
ignored if the time between CHP_RDN pulses is at least 350
cycles of the input clock, CLK_I, at which time the output buffer is
guaranteed to be full again.
Input Buffer Full : This signal will go active high after each write
(CHP_WRN) to the parallel port. The port is ready to be written
to again when this signal returns low. CHP_IBF can effectively be
ignored if the time between CHP_WRN pulses is at least 350
cycles of the input clock, CLK_I, at which time the input buffer is
guaranteed to be empty again.
Select 1. In Passive mode, connect to ground through 10k ohm
resistor.
unconnected.
Select 2 : In Passive mode, this pin becomes an active low enable
or chip select input for the parallel port. While CHP_SEL2 is high,
the AMBE-1000™ ignores any activity on the passive CHP_WRN
or CHP_RDN.
CHP_SEL2 should be tied to ground through a 10k ohm resistor.
In Active mode this pin is an output and can be left unconnected.
Data Bus bit 7
Data Bus bit 6
Data Bus bit 5
Data Bus bit 4
Data Bus bit 3
Data Bus bit 2
Data Bus bit 1
Data Bus bit 0
This implies that in parallel mode, each 20
In Active mode this pin is an output and can be left
To continuously enable the passive strobes,
It will return low some time after the first
In both active and passive modes the rising
The parallel interface runs