MT9123AE Zarlink Semiconductor, MT9123AE Datasheet - Page 2

• Manufacturer Part Number: MT9123AE
• Description: Description = Dual Voice Echo CANceller ( Itu-t G165 Compliant) ;; Package Type = Pdip ;; No. Of Pins = 28
• Manufacturer: Zarlink Semiconductor

MT9123
Pin Description
2
Pin #
1
2
3
FORMAT
PWRDN
Name
ENA1
ENB1
ENA2
MCLK
ENA1
ENB1
ENA2
ENB2
LAW
VSS
NLP
IC1
IC2
Rin
Sin
SSI Enable Strobe / ST-BUS Mode for Rin/Sout (Input). This pin has dual functions
depending on whether SSI or ST-BUS is selected.
For SSI, this strobe must be present for frame synchronization. This is an active high channel
enable strobe, 8 or 16 data bits wide, enabling serial PCM data transfer for Echo Canceller A
on Rin/Sout pins. Strobe period is 125 microseconds.
For ST-BUS, this pin, in conjunction with the ENB1 pin, will select the proper ST-BUS mode
for Rin/Sout pins (see ST-BUS Operation description). The selected mode applies to both
Echo Canceller A and B.
SSI Enable Strobe / ST-BUS Mode for Rin/Sout (Input). This pin has dual functions
depending on whether SSI or ST-BUS is selected.
For SSI, this is an active high channel enable strobe, 8 or 16 data bits wide, enabling serial
PCM data transfer for Echo Canceller B on Rin/Sout pins. Strobe period is 125 microseconds.
For ST-BUS, this pin, in conjunction with the ENA1 pin, will select the proper ST-BUS mode
for Rin/Sout pins (see ST-BUS Operation description). The selected mode applies to both
Echo Canceller A and B.
SSI Enable Strobe / ST-BUS Mode for Sin/Rout (Input). This pin has dual functions
depending on whether SSI or ST-BUS is selected.
For SSI, this is an active high channel enable strobe, 8 or 16 data bits wide, enabling serial
PCM data transfer for Echo Canceller A on Sin/Rout pins. Strobe period is 125 microseconds.
For ST-BUS, this pin, in conjunction with the ENB2 pin, will select the proper ST-BUS mode
for Sin/Rout pins (see ST-BUS Operation description). The selected mode applies to both
Echo Canceller A and B.
10
11
12
13
14
1
2
3
4
5
6
7
8
9
PDIP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
CONFIG2
CONFIG1
BCLK/C4i
F0i
Rout
Sout
VDD
F0od
S1/DATA1
S2/DATA2
S3/CS
S4/SCLK
IC4
IC3
Figure 2 - Pin Connections
MCLK
Description
VSS
NLP
IC1
IC2
Rin
Sin
5
6
7
8
9
10
11
PLCC
•
25
24
23
22
21
20
19
F0i
Rout
Sout
VDD
F0od
S1/DATA1
S2/DATA2
Data Sheet