MPC860 Motorola, MPC860 Datasheet - Page 35
MPC860
Manufacturer Part Number
MPC860
Description
Family Hardware Specifications
Manufacturer
Motorola
Datasheet
1.MPC860.pdf
(76 pages)
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1
These synchronous timings define when the WAITx signals are detected in order to freeze
(or relieve) the PCMCIA current cycle. The WAITx assertion will be effective only if it is
detected 2 cycles before the PSL timer expiration. See PCMCIA Interface in the MPC860
PowerQUICC User s Manual.
Figure 9-24 provides the PCMCIA access cycle timing for the external bus read.
Figure 9-25 provides the PCMCIA access cycle timing for the external bus write.
MOTOROLA
PSST = 1. Otherwise add PSST times cycle time.
PSHT = 0. Otherwise add PSHT times cycle time.
PCOE, IORD
CE1/CE2
CLKOUT
D[0:31]
A[0:31]
REG
Figure 9-24. PCMCIA Access Cycles Timing External Bus Read
ALE
TS
MPC860 Family Hardware Specifications
P46
P48
P52
P44
P45
P50
P53
B18
P47
P49
P51
P52
Bus Signal Timing
B19
35