MPC860 Motorola, MPC860 Datasheet - Page 55
MPC860
Manufacturer Part Number
MPC860
Description
Family Hardware Specifications
Manufacturer
Motorola
Datasheet
1.MPC860.pdf
(76 pages)
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11.6 SCC in NMSI Mode Electrical Specifications
Table 11-18 provides the NMSI external clock timing.
1
2
Table 11-19 provides the NMSI internal clock timing.
1
2
Figure 11-54 through Figure 11-56 show the NMSI timings.
MOTOROLA
Num
Num
The ratios SYNCCLK/RCLK1 and SYNCCLK/TCLK1 must be greater than or equal to 2.25/1.
Also applies to CD and CTS hold time when they are used as an external sync signal.
The ratios SYNCCLK/RCLK1 and SYNCCLK/TCLK1 must be greater or equal to 3/1.
Also applies to CD and CTS hold time when they are used as an external sync signals.
100
101
102
103
104
105
106
107
108
100
102
103
104
105
106
107
108
RCLK1 and TCLK1 width high
RCLK1 and TCLK1 width low
RCLK1 and TCLK1 rise/fall time
TXD1 active delay (from TCLK1 falling edge)
RTS1 active/inactive delay (from TCLK1 falling edge)
CTS1 setup time to TCLK1 rising edge
RXD1 setup time to RCLK1 rising edge
RXD1 hold time from RCLK1 rising edge
CD1 setup Time to RCLK1 rising edge
RCLK1 and TCLK1 frequency
RCLK1 and TCLK1 rise/fall time
TXD1 active delay (from TCLK1 falling edge)
RTS1 active/inactive delay (from TCLK1 falling edge)
CTS1 setup time to TCLK1 rising edge
RXD1 setup time to RCLK1 rising edge
RXD1 hold time from RCLK1 rising edge
CD1 setup time to RCLK1 rising edge
Table 11-18. NMSI External Clock Timing
Table 11-19. NMSI Internal Clock Timing
Characteristic
MPC860 Family Hardware Specifications
Characteristic
1
1
2
2
SCC in NMSI Mode Electrical Specifications
1/SYNCCLK + 5
1/SYNCCLK
0.00
0.00
5.00
5.00
5.00
5.00
Min
—
40.00
40.00
40.00
0.00
0.00
0.00
0.00
All Frequencies
Min
—
All Frequencies
SYNCCLK/3
15.00
50.00
50.00
Max
30.00
30.00
Max
—
—
—
—
—
—
—
—
—
—
—
MHz
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
55