MPC860 Motorola, MPC860 Datasheet - Page 50
MPC860
Manufacturer Part Number
MPC860
Description
Family Hardware Specifications
Manufacturer
Motorola
Datasheet
1.MPC860.pdf
(76 pages)
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Serial Interface AC Electrical Specifications
1
2
3
4
50
(FE=0, CE=0)
(FE=1, CE=1)
Num
The ratio SYNCCLK/L1RCLK must be greater than 2.5/1.
These specs are valid for IDL mode only.
Where P = 1/CLKOUT. Thus, for a 25-MHz CLKO1 rate, P = 40 ns.
These strobes and TxD on the first bit of the frame become valid after L1CLK edge or L1SYNC, whichever is later.
83a
83
84
85
86
87
88
L1RSYNC
L1ST(4-1)
L1RCLK
L1RCLK
(Output)
Figure 11-49. SI Receive Timing Diagram with Normal Clocking (DSC = 0)
L1RXD
(Input)
(Input)
(Input)
(Input)
L1RCLK, L1TCLK width low (DSC =1)
L1RCLK, L1TCLK width high (DSC = 1)
L1CLK edge to L1CLKO valid (DSC = 1)
L1RQ valid before falling edge of L1TSYNC
L1GR setup time
L1GR hold time
L1CLK edge to L1SYNC valid (FSD = 00) CNT = 0000, BYT = 0,
DSC = 0)
73
71
2
Table 11-17. SI Timing (continued)
MPC860 Family Hardware Specifications
Characteristic
76
75
74
72
3
70
BIT0
RFSD=1
4
78
77
71a
P + 10
P + 10
42.00
42.00
1.00
Min
—
—
All Frequencies
79
30.00
Max
0.00
—
—
—
—
—
MOTOROLA
L1TCL
Unit
ns
ns
ns
ns
ns
ns
K