ADC0806 National Semiconductor, ADC0806 Datasheet
ADC0806
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ADC0806 Summary of contents
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... MSPS with outstanding dynamic performance over its full operating range while consuming just 1.3 mW per MHz of clock frequency. That’s just power at 60 MSPS. Raising the PD pin puts the ADC08060 into a Power Down mode where it consumes just 1 mW. The unique architecture achieves 7.5 Effective Bits with 25 MHz input frequency ...
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... Ordering Information ADC08060CIMT ADC08060CIMTX Block Diagram Pin Descriptions and Equivalent Circuits Pin No. Symbol www.national.com TSSOP TSSOP (tape and reel) Equivalent Circuit Analog signal input. Conversion range is V Analog Input that is the high (top) side of the reference ladder of the ADC ...
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Pin Descriptions and Equivalent Circuits Pin No. Symbol CLK 13 thru 16 and D0–D7 19 thru GND GND ...
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... Absolute Maximum Ratings 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( Driver Supply Voltage ( Voltage on Any Input or Output Pin Reference Voltage ( CLK, OE Voltage Range Digital Output Voltage (V ...
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Converter Electrical Characteristics The following specifications apply for V duty cycle. Boldface limits apply for T Symbol Parameter CLK, PD DIGITAL INPUT CHARACTERISTICS I Logical Low Input Current IL C Logic Input Capacitance IN DIGITAL OUTPUT CHARACTERISTICS V High Level ...
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... The values for maximum power dissipation listed above will be reached only when the ADC08060 is operated in a severe fault condition (e.g., when input or output pins are driven beyond the power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided. Note 5: Human body model is 100 pF capacitor discharged through a 1.5 kΩ ...
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Typical Performance Characteristics wise stated INL INL vs Supply Voltage DNL 3V CLK 20006208 20006215 20006209 MHz MHz, unless other- IN INL vs Temperature 20006214 INL ...
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Typical Performance Characteristics otherwise stated (Continued) DNL vs Supply Voltage SNR vs Temperature SNR vs Sample Rate www.national.com 3V CLK DNL vs Sample Rate 20006218 SNR vs Supply Voltage 20006220 SNR vs ...
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Typical Performance Characteristics otherwise stated (Continued) SNR vs Clock Duty Cycle Distortion vs Supply Voltage Distortion vs Input Frequency 3V CLK Distortion vs Temperature 20006224 Distortion vs Sample Rate 20006226 Distortion vs ...
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Typical Performance Characteristics otherwise stated (Continued) SINAD/ENOB vs Temperature SINAD/ENOB vs Sample Rate SINAD/ENOB vs Clock Duty Cycle www.national.com 3V MHz CLK SINAD/ENOB vs Supply Voltage 20006230 SINAD/ENOB vs ...
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Typical Performance Characteristics otherwise stated (Continued) Spectral Response @ f = 10.1 MHz IN Intermodulation Distortion (IMD 3V CLK Spectral Response 20006244 20006242 MHz MHz, unless ...
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... POWER SUPPLY REJECTION RATIO (PSRR mea- sure of how well the ADC rejects a change in the power supply voltage. For the ADC08060, PSRR1 is the ratio of the change in dc power supply voltage to the resulting change in Full-Scale Error, expressed in dB. PSRR2 is a measure of www ...
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... Timing Diagram Functional Description The ADC08060 uses a new, unique architecture that achieves over 7.4 effective bits at input frequencies MHz. The analog input signal that is within the voltage range set by V and V is digitized to eight bits. Output format straight binary. Input voltages below V output word to consist of all zeroes ...
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Applications Information FIGURE 2. Simple, low component count reference biasing. Because of the ladder and external resistor tolerances, the reference voltage can vary too much for some applications. The reference bias circuit of Figure 2 is very simple and the ...
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... DO NOT allow this pin to float. 2.0 THE ANALOG INPUT The analog input of the ADC08060 is a switch followed by an integrator. The input capacitance changes with the clock level, appearing when the clock is low, and 4 pF when the clock is high ...
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... ADC. A choke or 27Ω resistor is recommended between these supply lines with adequate bypass capacitors close to the supply pins the case with all high speed converters, the ADC08060 should be assumed to have little power supply rejection. None of the supplies for the converter should be the supply that is used for other digital circuitry in any system with a lot of digital power being consumed ...
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... Applications Information 4.0 THE DIGITAL INPUT PINS The ADC08060 has two digital input pins: The PD pin and the Clock pin. 4.1 The PD Pin The Power Down (PD) pin, when high, puts the ADC08060 into a low power mode where power consumption is reduced to 1 mW. Output data is valid and accurate about 1 millisec- ond after the PD pin is brought low ...
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... DYNAMIC PERFORMANCE The ADC08060 is ac tested and its dynamic performance is guaranteed. To meet the published specifications, the clock source driving the CLK input must exhibit less than 10 ps (rms) of jitter. For best ac performance, isolating the ADC clock from any digital circuitry should be done with adequate buffers, as with a clock tree ...
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... National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. inches (millimeters) unless otherwise noted 24-Lead Package TC Order Number ADC08060CIMT NS Package Number MTC24 2. A critical component is any component of a life ...