ADC0806 National Semiconductor, ADC0806 Datasheet - Page 6

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ADC0806

Manufacturer Part Number
ADC0806
Description
500 ns A/D Converter with S/H Function and Input Multiplexer
Manufacturer
National Semiconductor
Datasheet

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POWER SUPPLY CHARACTERISTICS
PC
PSRR
PSRR
AC ELECTRICAL CHARACTERISTICS
f
f
t
t
t
t
t
t
C1
C2
CL
CH
OH
OD
AD
AJ
Symbol
Converter Electrical Characteristics
The following specifications apply for V
duty cycle. Boldface limits apply for T
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: All voltages are measured with respect to GND = AGND = DR GND = 0V, unless otherwise specified.
Note 3: When the input voltage at any pin exceeds the power supplies (that is, less than AGND or DR GND, or greater than V
should be limited to 25 mA. The 50 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input
current of 25 mA to two.
Note 4: The absolute maximum junction temperature (T
junction-to-ambient thermal resistance (θ
TSSOP, θ
this device under normal operation will typically be about 180 mW (88 mW quiescent power +12 mW reference ladder power). The values for maximum power
dissipation listed above will be reached only when the ADC08060 is operated in a severe fault condition (e.g., when input or output pins are driven beyond the power
supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided.
Note 5: Human body model is 100 pF capacitor discharged through a 1.5 kΩ resistor. Machine model is 220 pF discharged through ZERO Ohms.
Note 6: See AN-450, “Surface Mounting Methods and Their Effect on Product Reliability”, or the section entitled “Surface Mount” found in any post 1986 National
Semiconductor Linear Data Book, for other methods of soldering surface mount devices.
Note 7: The analog inputs are protected as shown below. Input voltage magnitudes up to V
However, errors in the A/D conversion can occur if the input goes above DR V
voltage must be ≤2.6V
Note 8: To guarantee accuracy, it is required that V
Note 9: Typical figures are at T
Level).
1
2
JA
Power Consumption
Power Supply Rejection Ratio
Power Supply Rejection Ratio
Maximum Conversion Rate
Minimum Conversion Rate
Minimum Clock Low Time
Minimum Clock High Time
Output Hold Time
Output Delay
Pipeline Delay (Latency)
Sampling (Aperture) Delay
Aperture Jitter
is 92˚C/W, so P
DC
to ensure accurate conversions.
D
Parameter
MAX = 1,358 mW at 25˚C and 435 mW at the maximum operating ambient temperature of 85˚C. Note that the power consumption of
J
= 25˚C, and represent most likely parametric norms. Test limits are guaranteed to National’s AOQL (Average Outgoing Quality
JA
), and the ambient temperature (T
A
A
A
= DR V
= T
and DR V
J
MIN
max) for this device is 150˚C. The maximum allowable power dissipation is dictated by T
DC Input
f
PD = Low
CLK Low, PD = Hi
FSE change with 2.7V to 3.3V change
in V
SNR change with 200 mV at 200 kHz
on supply
CLK Rise to Data Invalid
CLK Rise to Data Valid
CLK Fall to Acquisition of Data
D
IN
to T
D
= +3.0V
= 10 MHz, V
be well bypassed. Each supply pin must be decoupled with separate bypass capacitors.
A
MAX
: all other limits T
DC
A
D
), and can be calculated using the formula P
or below GND by more than 100 mV. For example, if V
, V
(Continued)
Conditions
6
IN
RT
= FS − 3 dB,
= +1.9V, V
A
+ 300 mV or to 300 mV below GND will not damage this device.
A
20006207
= 25˚C (Notes 7, 8)
RB
= 0.3V, C
(Note 9)
Typical
L
0.6
4.4
8.2
2.5
1.5
76
88
54
45
70
20
2
= 10 pF, f
D
MAX = (T
A
or DR V
(Note 9)
Limits
J
A
CLK
max − T
is 2.7V
6.7
6.7
96
60
12
D
= 60 MHz at 50%
), the current at that pin
DC
A
) / θ
the full-scale input
JA
Clock Cycles
mW (max)
MHz (min)
. In the 24-pin
ns (max)
ns (min)
ns (min)
(Limits)
ps rms
Units
J
MHz
mW
mW
max, the
dB
dB
ns
ns

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