ADC08L060CIMT National Semiconductor, ADC08L060CIMT Datasheet - Page 3

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ADC08L060CIMT

Manufacturer Part Number
ADC08L060CIMT
Description
8-Bit/ 10 MSPS to 60 MSPS/ 0.65 mW/MSPS A/D Converter with Internal Sample-and-Hold
Manufacturer
National Semiconductor
Datasheet

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Pin Descriptions and Equivalent Circuits
13 thru 16
19 thru 22
2, 5, 8, 11
Pin No.
1, 4, 12
and
23
24
18
17
7
V
DR GND
Symbol
D0–D7
AGND
IN
CLK
V
PD
V
GND
DR
A
Equivalent Circuit
3
(Continued)
Power Down input. When this pin is high, the converter is
in the Power Down mode and the data output pins hold
the last conversion result.
CMOS/TTL compatible digital clock Input. V
on the rising edge of CLK input.
Conversion data digital Output pins. D0 is the LSB, D7 is
the MSB. Valid data is output after the rising edge of the
CLK input.
Reference ground for the single-ended analog input, V
Positive analog supply pin. Connect to a quiet voltage
source of +3V. V
ceramic chip capacitor for each pin, plus one
10 µF capacitor. See Section 3.0 for more information.
Power supply for the output drivers. If connected to V
decouple well from V
The ground return for the output driver supply.
The ground return for the analog supply.
A
should be bypassed with a 0.1 µF
A
.
Description
IN
www.national.com
is sampled
A
IN
,
.

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