ADC1175-50CIMT National Semiconductor, ADC1175-50CIMT Datasheet - Page 11

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ADC1175-50CIMT

Manufacturer Part Number
ADC1175-50CIMT
Description
8-Bit/ 50 MSPS/ 125 mW A/D Converter
Manufacturer
National Semiconductor
Datasheet

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Applications Information
and 7 pF when the clock is high. Since a dynamic capaci-
tance is more difficult to drive than is a fixed capacitance,
choose an amplifier that can drive this type of load. The
2.0 REFERENCE INPUTS
The reference inputs V
ence Bottom) are the top and bottom of the reference ladder.
Input signals between these two voltages will be digitized to
8 bits. External voltages applied to the reference input pins
should be within the range specified in the Electrical Charac-
teristics table (1.0V to AV
for V
be able to source sufficient current into the V
sufficient current from the V
The reference ladder can be self-biased by connecting V
to V
bottom reference voltages of approximately 2.6V and 0.6V,
respectively, with V
Figure 3 . If V
analog ground, a top reference voltage of approximately
2.3V is generated. The top and bottom of the ladder should
be bypassed with 10 µF tantalum capacitors located close to
the reference pins.
The reference self-bias circuit of Figure 3 is very simple and
the performance is adequate for many applications. Better
linearity performance can generally be achieved by driving
the reference pins with a low impedance source.
RTS
RB
). Any device used to drive the reference pins should
and connecting the V
RT
FIGURE 3. Driving the ADC1175-50. Choose an op-amp that can drive a dynamic capacitance.
and V
CC
RTS
= 5.0V. This connection is shown in
RT
DD
are tied together, but V
(Reference Top) and V
for V
RB
RB
pin.
RT
to V
and 0V to (AV
RBS
to provide top and
(Continued)
RT
pin and sink
RB
DD
RB
is tied to
− 1.0V)
(Refer-
RT
11
CLC409 has been found to be an excellent device for driving
the ADC1175-50. Do not drive the input beyond the supply
rails. Figure 3 gives an example of driving circuitry.
By forcing a little current into or out of the top and bottom of
the ladder, as shown in Figure 4 , the top and bottom refer-
ence voltages can be trimmed and performance improved
over the self-bias method of Figure 3 . The resistive divider at
the amplifier inputs can be replaced with potentiometers, if
desired. The LMC662 amplifier shown was chosen for its low
offset voltage and low cost. Note that a negative power sup-
ply is needed for these amplifiers as the lower one may be
required to go slightly negative to force the required refer-
ence voltage.
If reference voltages are desired that are more than a few
tens of millivolts from the self-bias values, the circuit of Fig-
ure 5 will allow forcing the reference voltages to whatever
levels are desired. This circuit provides the best performance
because of the low source impedance of the transistors.
Note that the V
To minimize noise effects and ensure accurate conversions,
the total reference voltage range (V
minimum of 1.0V and a maximum of about 2.8V.
The ADC1175-50 is designed to operate with top and bottom
references of 2.6V and 0.6V, respectively. However, it will
function with reduced performance with a top reference volt-
age as high as AV
RTS
DD
and V
.
RBS
pins are left floating.
DS100896-25
RT
− V
RB
) should be a
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