ADC1175-50CIMTX National Semiconductor, ADC1175-50CIMTX Datasheet
ADC1175-50CIMTX
Specifications of ADC1175-50CIMTX
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ADC1175-50CIMTX Summary of contents
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... The ADC1175-50 is offered in TSSOP and is designed to op- erate over the extended commercial temperature range of −20°C to +75°C. ...
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... Ordering Information Order Code ADC1175-50CIJM * ADC1175-50CIJMX * ADC1175-50CIMT ADC1175-50CIMTX ADC1175-50CILQ * ADC1175-50CILQX * ADC1175-50EVAL * Obsolete in the SOIC (EIAJ) and LLP packages. The Evaluation Board is also discontinued. Shown for reference only. Block Diagram www.national.com Temperature Range Description −20°C to +70°C SOIC (EIAJ) −20°C to +70°C SOIC (EIAJ) tape and reel − ...
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... Bypass well RB (unless grounded). See Section 2.0 for more information. CMOS/TTL compatible Digital input that, when high, puts the ADC1175-50 into a power-down mode where total power consumption is typically less than 5 mW. With this pin low, the device is in the normal operating mode ...
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... Positive analog supply pin. Connect to a quiet voltage source of +5V. AV source and be separately bypassed with a 10 µF capacitor and a 0.1 µF ceramic chip capacitor. See Section 4.0 for more information. The ground return for the analog supply. AV should be connected together close to the ADC1175-50 package. 4 Description is sampled on IN ...
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... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( Voltage on Any Input or Output Pin Reference Voltage ( CLK, PD Voltage Range Digital Output Voltage ( Input Current at Any Pin (Note 3) Package Input Current (Note 3) Power Dissipation 25° ...
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Symbol Parameter Reference Top Self Bias V RT Voltage Reference Bottom Self Bias V RB Voltage V – RTS Self Bias Voltage Delta V RBS V – V Reference Voltage Differential RT RB CONVERTER DYNAMIC CHARACTERISTICS ENOB Effective Number of ...
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... JA for maximum power dissipation listed above will be reached only when the ADC1175-50 is operated in a severe fault condition (e.g., when input or output pins are driven beyond the power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided. ...
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Typical Performance Characteristics INL Plot INL vs. Temperature SNR vs. Temp & f www.national.com 5V 10089611 10089613 IN 10089615 MHz, unless otherwise stated. CLK DNL Plot 10089612 DNL vs. Temperature ...
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SINAD & ENOB vs. Temp & 10089617 SFDR vs. Temp & 10089619 Power Supply Current vs. f CLK 10089621 SINAD & ENOB vs. Clock Duty Cycle t vs. Temperature OD Spectral Response 9 10089618 10089620 10089622 ...
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Specification Definitions ANALOG INPUT BANDWIDTH is a measure of the frequen which the reconstructed output fundamental drops 3 dB below its low frequency value for a full scale input. The test is performed with f equal to 100 ...
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... Timing Diagram FIGURE 1. ADC1175-50 Timing Diagram 10089624 FIGURE Test Circuit EN DIS 11 10089623 www.national.com ...
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... RTS LMH6609 have been found to be excellent amplifiers for driv- is ing the ADC1175-50. Do not drive the input beyond the supply RT rails. Figure 3 shows an example of an input circuit using the LMH6702. Driving the analog input with input signals up to 2.8 V ...
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... FIGURE 3. Driving the ADC1175-50. Choose an op-amp that can drive a dynamic capacitance. 13 10089625 www.national.com ...
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... RT to provide top and bot- The ADC1175-50 is designed to operate with top and bottom references of 2.6V and 0.6V, respectively. However, it will function with reduced performance with a top reference volt- is tied to age as high ground ...
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... Because of this, the output data tran- sition occurs very near the falling edge of the ADC clock. To avoid clocking errors, you should use the rising edge of the ADC clock to latch the output data of the ADC1175-50 and not use the falling edge. 4.0 POWER SUPPLY CONSIDERATIONS Many A/D converters draw sufficient transient current to cor- rupt their own power supplies if not adequately bypassed ...
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... DYNAMIC PERFORMANCE The ADC1175-50 is a.c. tested and its dynamic performance is guaranteed. To meet the published specifications, the clock source driving the CLK input must be free of jitter. For best a ...
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... The LMH6702 and the LMH6609 have been found excellent device for driving the ADC1175-50. Also re- member to use the RC between the driving source and the ADC input, as explained in Section 1.0. Driving the V pin or the V pin with devices that can RT RB not source or sink the current required by the ladder. As mentioned in Section 2 ...
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... Physical Dimensions Product in the SOIC (EIAJ) package is obsolete. Shown for reference only. www.national.com inches (millimeters) unless otherwise noted 24-Lead Package JM Order Number ADC1175-50CIJM NS Package Number M24D 24-Lead Package TC Order Number ADC1175-50CIMT NS Package Number MTC24 18 ...
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... Package LLP Order Number ADC1175-50CILQX NS Package Number LQA24A 19 www.national.com ...
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... National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other brand or product names may be trademarks or registered trademarks of their respective holders. ...