TS68020 ATMEL Corporation, TS68020 Datasheet - Page 26

• Manufacturer Part Number: TS68020
• Description: Hcmos 32-bit Virtual Memory Mpu, 16/20/25 MHZ
• Manufacturer: ATMEL Corporation

Table 8. TS68020 Addressing Modes
26
Addressing Modes
Register Direct
Register Indirect
Register Indirect with Index
Memory Indirect
Program Counter Indirect with Displacement
Program Counter Indirect with Index
Program Counter Memory Indirect
Data Register Direct
Address Register Direct
Address Register Indirect
Address Register Indirect with Post Increment
Address Register Indirect with Predecrement
Address Register Indirect with Displacement
Address Register Indirect with Index (8-bit Displacement)
Address Register Indirect with Index (Base Displacement)
Memory Indirect Post-Indexed
Memory Indirect Pre-Indexed
PC Indirect with Index (8-bit Displacement)
PC Indirect with Index (Base Displacement)
PC Memory Indirect Post-Indexed
PC Memory Indirect Pre-Indexed
TS68020
The 18 addressing modes, shown in Table 8, include nine basic types:
•
•
•
•
•
•
•
•
•
The register indirect addressing modes support postincrement, predecrement, offset,
and indexing. Programmers find these capabilities particularly useful for handling
advanced data structures common to sophisticated applications and high level lan-
guages. The program counter relative mode also has index and offset capabilities;
programmers find that this addressing mode is required to support position-independent
software. In addition to these addressing modes, the TS68020 provides data operand
sizing and scaling; these features provide performance enhancements to the
programmer.
.
Register Direct
Register Indirect
Register Indirect with Index
Memory Indirect
Program Counter Indirect with Displacement
Program Counter Indirect with Index
Program Counter Memory Indirect
Absolute
Immediate
Syntax
Dn
An
(An)
(An) +
– (An)
(d
(d
(bd, An, Xn)
([bd, An], Xn, od)
([bd, An, Xn], od)
(d
(d
(bd, PC, Xn)
([bd, PC], Xn, od)
([bd, PC, Xn]), od)
16
8
16
8
, An, Xn)
, PC, Xn)
An)
, PC)
2115A–HIREL–07/02