PIC18F6620 Microchip, PIC18F6620 Datasheet - Page 289

• Manufacturer Part Number: PIC18F6620
• Description: Microcontroller
• Manufacturer: Microchip

NEGF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
 2004 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction
After Instruction
Decode
REG
REG
Q1
PIC18F6520/8520/6620/8620/6720/8720
=
=
register ‘f’
Negate f
[ label ]
0
a
( f ) + 1
N, OV, C, DC, Z
Location ‘f’ is negated using two’s
complement. The result is placed in
the data memory location ‘f’. If ‘a’ is
‘0’, the Access Bank will be
selected, overriding the BSR value.
If ‘a’ = 1, then the bank will be
selected as per the BSR value.
1
1
NEGF
Read
0110
Q2
0011 1010 [0x3A]
1100 0110 [0xC6]
f
[0,1]
255
REG, 1
NEGF
f
110a
Process
Data
Q3
f [,a]
ffff
register ‘f’
Write
Q4
ffff
NOP
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
None.
Q Cycle Activity:
Decode
Q1
operation
No Operation
[ label ]
None
No operation
None
No operation.
1
1
0000
1111
No
Q2
NOP
0000
xxxx
operation
No
Q3
DS39609B-page 287
0000
xxxx
operation
No
Q4
0000
xxxx