PIC18F87J93 Microchip Technology, PIC18F87J93 Datasheet - Page 19
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PIC18F87J93
Manufacturer Part Number
PIC18F87J93
Description
LCD PIC18F Microcontroller
Manufacturer
Microchip Technology
Datasheet
1.PIC18F87J93.pdf
(54 pages)
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TABLE 1-3:
© 2009 Microchip Technology Inc.
RG0/LCDBIAS0
RG1/TX2/CK2
RG2/RX2/DT2/V
RG3/V
RG4/SEG26/RTCC
V
V
AV
AV
ENVREG
V
Legend: TTL = TTL compatible input
Note 1:
SS
DD
DDCORE
SS
DD
RG0
LCDBIAS0
RG1
TX2
CK2
RG2
RX2
DT2
V
RG3
V
RG4
SEG26
RTCC
V
V
LCAP
LCAP
DDCORE
CAP
2:
LCAP
Pin Name
/V
1
2
ST
I
P
Default assignment for CCP2 when the CCP2MX Configuration bit is set.
Alternate assignment for CCP2 when the CCP2MX Configuration bit is cleared.
2
CAP
LCAP
= Schmitt Trigger input with CMOS levels
= Input
= Power
PIC18F6XJ93 (64-PIN DEVICE) PINOUT I/O DESCRIPTIONS (CONTINUED)
1
Pin Number
9, 25, 41, 56
26, 38, 57
TQFP
20
19
18
10
3
4
5
6
8
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
P
P
P
P
P
P
I
I
I
I
I
Analog
Analog
Analog
Analog
Buffer
Type
Preliminary
ST
ST
ST
ST
ST
ST
ST
ST
ST
—
—
—
—
—
—
—
—
PORTG is a bidirectional I/O port.
Ground reference for logic and I/O pins.
Positive supply for logic and I/O pins.
Ground reference for analog modules.
Positive supply for analog modules.
Enable for on-chip voltage regulator.
Core logic power or external filter capacitor connection.
Digital I/O.
BIAS0 input for LCD.
Digital I/O.
AUSART asynchronous transmit.
AUSART synchronous clock (see related RX2/DT2).
Digital I/O.
AUSART asynchronous receive.
AUSART synchronous data (see related TX2/CK2).
LCD charge pump capacitor input.
Digital I/O.
LCD charge pump capacitor input.
Digital I/O.
SEG26 output for LCD.
RTCC output
PIC18F87J93 FAMILY
Positive supply for microcontroller core logic
(regulator disabled).
External filter capacitor connection (regulator enabled).
CMOS = CMOS compatible input or output
Analog = Analog input
O
OD
= Output
= Open-Drain (no P diode to V
Description
DS39948A-page 17
DD
)