MT9046 Zarlink Semiconductor, MT9046 Datasheet - Page 15

• Manufacturer Part Number: MT9046
• Description: T1/E1 System Synchronizer with Holdover
• Manufacturer: Zarlink Semiconductor

MT9046
Data Sheet
Holdover Accuracy
Holdover accuracy is defined as the absolute tolerance of an output clock signal, when it is not locked to an external
reference signal, but is operating using storage techniques. For the MT9046, the storage value is determined while
the device is in Normal Mode and locked to an external reference signal.
The absolute Master Clock (OSCi) accuracy of the MT9046 does not affect Holdover accuracy, but the change in
OSCi accuracy while in Holdover Mode does.
Capture Range
Also referred to as pull-in range. This is the input frequency range over which the synchronizer must be able to pull
±
into synchronization. The MT9046 capture range is equal to
230 ppm minus the accuracy of the master clock
(OSCi). For example, a 32 ppm master clock results in a capture range of 198 ppm.
Lock Range
This is the input frequency range over which the synchronizer must be able to maintain synchronization. The lock
range is equal to the capture range for the MT9046.
Phase Slope
Phase slope is measured in seconds per second and is the rate at which a given signal changes phase with respect
to an ideal signal. The given signal is typically the output signal. The ideal signal is of constant frequency and is
nominally equal to the value of the final output signal or final input signal.
Time Interval Error (TIE)
TIE is the time delay between a given timing signal and an ideal timing signal.
Maximum Time Interval Error (MTIE)
MTIE is the maximum peak to peak delay between a given timing signal and an ideal timing signal within a
particular observation period.
MTIE S ( )
TIEmax t ( ) TIEmin t ( )
=
–
Phase Continuity
Phase continuity is the phase difference between a given timing signal and an ideal timing signal at the end of a
particular observation period. Usually, the given timing signal and the ideal timing signal are of the same frequency.
Phase continuity applies to the output of the synchronizer after a signal disturbance due to a reference switch or a
mode change. The observation period is usually the time from the disturbance, to just after the synchronizer has
settled to a steady state.
±
In the case of the MT9046, the output signal phase continuity is maintained to within
5 ns at the instance (over
one frame) of all reference switches and all mode changes. The total phase shift, depending on the switch or type
of mode change, may accumulate up to 200 ns over many frames. The rate of change of the 200 ns phase shift is
limited to a maximum phase slope of approximately 5 ns/125 us. This meets the AT&T TR62411 maximum phase
slope requirement of 7.6 ns/125 us and Bellcore GR-1244-CORE (81 ns/1.326 ms).
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Zarlink Semiconductor Inc.