MT9046 Zarlink Semiconductor, MT9046 Datasheet - Page 9

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MT9046

Manufacturer Part Number
MT9046
Description
T1/E1 System Synchronizer with Holdover
Manufacturer
Zarlink Semiconductor
Datasheet

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because the Holdover Mode is very accurate (e.g.,
and output after switching back to Normal Mode is preserved.
State Machine Control
As shown in Figure 1, this state machine controls the Reference Select MUX, the TIE Corrector Circuit and the
DPLL. Control is based on the logic levels at the control inputs RSEL, MS1, MS2 and PCCi (See Figure 6). When
switching from Primary Holdover to Primary Normal, the TIE Corrector Circuit is enabled when PCCi = 1, and
disabled when PCCi = 0.
All state machine changes occur synchronously on the rising edge of F8o. See the Control and Mode of Operation
section for full details.
Master Clock
The MT9046 can use either a clock or crystal as the master timing source. For recommended master timing
circuits, see the Applications - Master Clock section.
Control and Mode of Operation
The active reference input (PRI or SEC) is selected by the RSEL pin as shown in Table 2.
Figure 6 - Control State Machine Block Diagram
MS2
RSEL
RSEL
0
0
1
1
0
1
Table 3 - Operating Modes and States
Table 2 - Input Reference Selection
Select MUX
Reference
To
MS1
0
1
0
1
Zarlink Semiconductor Inc.
MS1
State Machine
MT9046
±
Corrector
To TIE
Enable
Control
0.2 ppm).
Input Reference
9
MS2
HOLDOVER
FREERUN
SEC
PRI
NORMAL
Reserved
To DPLL
Select
State
Mode
Consequently, the phase delay between the input
PCCi
Data Sheet

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