BD8305MUV Rohm, BD8305MUV Datasheet - Page 11

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BD8305MUV

Manufacturer Part Number
BD8305MUV
Description
High-effciency Step-up/down Switching Regulators
Manufacturer
Rohm
Datasheet
BD8305MUV
c
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(4) Output voltage setting
(5) Determination of phase compensation
The internal reference voltage of the ERROR AMP is 0.8 V. Output voltage should be obtained by referring to Equation
(8) of Fig.32.
Condition for stable application
The condition for feedback system stability under negative feedback is as follows:
- Phase delay is 135 °or less when gain is 1 (0 dB) (Phase margin is 45° or higher)
- Phase delay must be 135°or lower when gain is 1 (0 dB) (Phase margin is 45° or higher).
- The GBW at that time (frequency when gain is 0 dB) must be equal to or lower than 1/5 of the switching frequency.
One of the points to secure stability by phase compensation is to cancel secondary phase delay (-180°) generated by LC
resonance by the secondary phase lead (i.e. put two phase leads).
Since GBW is determined by the phase compensation capacitor attached to the error amplifier, when it is necessary to
reduce GBW, the capacitor should be made larger.
Phase compensation when output capacitor with low ESR such as ceramic capacitor is used is as follows:
When output capacitor with low ESR (several tens of mΩ) is used for output, secondary phase lead (two phase leads)
must be put to cancel secondary phase lead caused by LC.One of the examples of phase compensation methods is as
follows:
Since DC/DC converter application is sampled according to the switching frequency, the GBW of the whole system
(frequency at which gain is 0 dB) must be set to be equal to or lower than 1/5 of the switching frequency.
In summary, target property of applications is as follows:
For this reason, switching frequency must be increased to improve responsiveness.
Error AMP is a low-pass filter because phase compensation such as
(1) and (2) is performed. For DC/DC converter application, R is a
parallel feedback resistance.
Fig.33 General integrator
R
R2
R1
VOUT
C
INV
ERROR AMP
VREF
0.8V
Fig. 32 Setting of feedback resistance
FB
11/15
Vo=
PHASE
[degree]
GAIN
[dB]
(R1+R2)
R2
Point (A) fp=
Point (B) f
-180°
-90°
×0.8 [V] ・・・ (8)
0
A
Fig.34 Frequency property of integrator
GBW
Phase margin
=
2πRCA
2πRC
(A)
1
1
-20dB/decade
(B)
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Technical Note
2010.05 - Rev.D
[Hz]
[Hz]
(10)
(9)

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