SI3460 Silicon Laboratories, SI3460 Datasheet - Page 4

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SI3460

Manufacturer Part Number
SI3460
Description
IEEE 802.3af PSE INTERFACE AND DC-DC CONTROLLER
Manufacturer
Silicon Laboratories
Datasheet

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Si3460
2. Si3460-EVB Application Diagram
2.1. Si3460-EVB Performance Characteristics
When implemented according to the recommended external components and layout guidelines for the Si3460-
EVB, the Si3460 enables the following performance specifications in single-port PSE applications. Please refer to
the Si3460-EVB User’s Guide and schematics for details.
4
Power Supplies
V
V
VDD supply voltage range
VDD UVLO voltage
Output supply voltage
Supply current
Detection Specifications
Minimum signature resistance
Maximum signature resistance
Classification Specifications
Classification voltage
Classification current limit
Classification current region
+11V
16V
V
IN
IN
to
IN
Note: Refer to the Si3460-EVB User Guide for complete schematic details
input supply range
input UVLO voltage
Parameter
Table 1. Selected Electrical Specifications (Si3460-EVB)
V
EE
I
Figure 2. Si3460-EVB Application Diagram
CLASS
RST
R
Symbol
R
V
V
I
UVLO
V
DETmax
CLASS
DETmin
CLASS
V
DDmin
V
OUT
I
_
DD
IN
IN
REGION
Si3460
GND
VDD
–40 to +85 °C ambient range
UVLO turn-off voltage at V
Si3460 supply voltage range
Si3460 UVLO turn-off voltage
PSE output voltage at
V
Current into V
(including gate drive and detect)
0 mA < I
Measured with 200 Ω across V
Class 0
Class 1
Class 2
Class 3
Class 4
Preliminary Rev. 0.4
IN
= 11 V (min) to 16 V (max)
VSENSE
STATUS
ISENSE
250KHZ
CTRL1
CTRL2
GATE
DETA
CLASS
Test Condition
DD
< 45 mA
PWM
BOM
DETECT
FAULT
PGOOD
IN
OUT
–20.5
26.5
Min
–54
2.7
2.7
11
10
15
55
16
25
35
0
8
Detect
BOM
12, 15
Typ
–50
3.3
17
29
5
–15.5
Max
–46
3.6
16
19
33
95
13
21
31
45
5
magnetics)
(to port
output
-48 V
V
PSE
OUT
Unit
mA
mA
mA
mA
mA
mA
mA
V
V
V
V
V
V
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