74ALVC16721 Fairchild Semiconductor, 74ALVC16721 Datasheet
74ALVC16721
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74ALVC16721 Summary of contents
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... Tolerant Inputs and Outputs General Description The ALVC16721 contains twenty non-inverting D-type flip-flops with 3-STATE outputs and is intended for bus ori- ented applications. The 74ALVC16721 is designed for low voltage (1.65V to 3.6V) V applications with I/O compatibility up to 3.6V. CC The 74ALVC16721 is fabricated with an advanced CMOS technology to achieve high speed operation while maintain- ing low CMOS power dissipation ...
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... LOW-to-HIGH transition Functional Description The 74ALVC16721 contains twenty D-type flip-flops with 3-STATE standard outputs. The twenty flip-flops will store the state of their individual D-type inputs that meet the setup and hold time requirements on the LOW-HIGH Clock (CLK) transition, when the Clock-Enable (CE) is LOW. The 3-STATE standard outputs are controlled by the Output Enable (OE) ...
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Absolute Maximum Ratings Supply Voltage ( Input Voltage ( Output Voltage (V ) (Note 3) 0. Input Diode Current ( Output Diode Current (I ) ...
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AC Electrical Characteristics Symbol Parameter V CC Min f Maximum Clock Frequency 250 MAX Propagation Delay PHL PLH 1.3 Bus to Bus Output Enable Time 1.3 PZL PZH Output Disable Time ...
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AC Loading and Waveforms FIGURE 1. AC Test Circuit (Input Characteristics: f Symbol 3. FIGURE 2. Waveform for Inverting and Non-inverting Functions ...
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Physical Dimensions inches (millimeters) unless otherwise noted 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the ...