MC54HC4060A Motorola, MC54HC4060A Datasheet

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MC54HC4060A

Manufacturer Part Number
MC54HC4060A
Description
14-Stage Binary Ripple Counter With Oscillator
Manufacturer
Motorola
Datasheet

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
14-Stage Binary Ripple
Counter With Oscillator
High–Performance Silicon–Gate CMOS
MC14060B. The device inputs are compatible with standard CMOS out-
puts; with pullup resistors, they are compatible with LSTTL outputs.
with a frequency that is controlled either by a crystal or by an RC circuit
connected externally. The output of each flip–flop feeds the next and the
frequency at each output is half of that of the preceding one. The state of
the counter advances on the negative–going edge of the Osc In. The
active–high Reset is asynchronous and disables the oscillator to allow
very low power consumption during stand–by operation.
of internal ripple delays. Therefore, decoded output signals are subject to
decoding spikes and may have to be gated with Osc Out 2 of the
HC4060A.
3/96
10/95
Osc In
Reset
Motorola, Inc. 1996
Motorola, Inc. 1995
The MC54/74C4060A is identical in pinout to the standard CMOS
This device consists of 14 master–slave flip–flops and an oscillator
State changes of the Q outputs do not occur simultaneously because
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1 A
High Noise Immunity Characteristic of CMOS Devices
In Compliance With JEDEC Standard No. 7A Requirements
Chip Complexity: 390 FETs or 97.5 Equivalent Gates
11
12
LOGIC DIAGRAM
Osc Out 1 Osc Out 2
10
Pin 16 = V CC
Pin 8 = GND
9
14
13
15
7
5
4
6
1
2
3
Q4
Q5
Q6
Q7
Q8
Q9
Q10
Q12
Q13
Q14
3–1
3–1
Pinout: 16–Lead Plastic Package (Top View)
V CC
Q12
16
1
MC54/74HC4060A
Clock
16
REV 1
REV 6
16
X
16
Q10
Q13
16
15
2
1
1
MC54HCXXXXAJ
MC74HCXXXXAN
MC74HCXXXXAD
MC74HCXXXXADT
1
1
ORDERING INFORMATION
Q14
Q8
14
3
Reset
FUNCTION TABLE
H
L
L
Q9
Q6
13
4
Reset Osc In
CERAMIC PACKAGE
Q5
PLASTIC PACKAGE
12
5
TSSOP PACKAGE
Advance to Next State
SOIC PACKAGE
CASE 748C–03
All Outputs Are Low
CASE 751B–05
CASE 620–10
CASE 648–08
DT SUFFIX
N SUFFIX
D SUFFIX
J SUFFIX
Output State
Q7
11
No Charge
6
Ceramic
Plastic
SOIC
TSSOP
Out 1
Osc
Q4
10
7
Out 2
GND
Osc
9
8

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MC54HC4060A Summary of contents

Page 1

... Q10 1 Q12 2 Q13 3 Q14 12 Pin Reset Pin 8 = GND 3/96 10/95 Motorola, Inc. 1996 Motorola, Inc. 1995 MC54/74HC4060A 16 Clock Pinout: 16–Lead Plastic Package (Top View Q12 3–1 REV 1 3–1 REV 6 J SUFFIX CERAMIC PACKAGE 16 CASE 620– SUFFIX PLASTIC PACKAGE CASE 648– ...

Page 2

... For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). Î Î Î Î Î Î Î Î ...

Page 3

... Voltage (Osc Out 1, Osc Out Maximum Input Leakage Current I CC Maximum Quiescent Supply Current (per Package) NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). AC CHARACTERISTICS ( pF, Input ns) Symbol Symbol Parameter ...

Page 4

... C in Maximum Input Capacitance NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High– Speed CMOS Data Book (DL129/D). * For and pF, typical propagation delay from Clock to other Q outputs may be calculated with the following equations 2 [93.7 + 59.3 (n– ...

Page 5

... Figure 6, Osc Out 2 must be left open circuited. SWITCHING WAVEFORMS Reset PHL GND Q Osc DEVICE GND UNDER TEST *Includes all probe and jig capacitance Figure 4. Test Circuit 3–5 MC54/74HC4060A 50% GND 50% t rec V CC 50% GND Figure 2. TEST POINT OUTPUT MOTOROLA ...

Page 6

... Q7 = Pin 6 Osc Out Pin Pin 13 11 Osc In 12 Reset 12 Reset Osc In 11 Osc Out Figure 6. Oscillator Circuit Using RC Configuration 12 Reset Figure 7. Pierce Crystal Oscillator Circuit MOTOROLA Q10 = Pin Pin 16 GND = Pin 8 Figure 5 ...

Page 7

... Supply 4.0 Expected Minimum 5Vdc Supply 3.3 Expected Minimum 6Vdc Supply 3.1 Expected Minimum Figure 8. Equivalent Crystal Networks R R load X load Figure 10. Parasitic Capacitances of the Amplifier 3–7 MC54/74HC4060A out Values are listed in Table 1. MOTOROLA ...

Page 8

... SELECTING R f The feedback resistor typically ranges up to 20M . R f determines the gain and bandwidth of the amplifier. Proper bandwidth insures oscillation at the correct frequency plus roll-off to minimize gain at undesirable frequencies, such as MOTOROLA DESIGN PROCEDURES ) (where the loading capacitor is an external load, not including ...

Page 9

... Clock Reset Q10 Q12 Q13 Q14 High–Speed CMOS Logic Data DL129 — Rev 128 256 512 Figure 11. Timing Diagram 3–9 MC54/74HC4060A 1024 2048 4096 8192 16384 MOTOROLA ...

Page 10

... 0.25 (0.010) –A – –T – SEATING PLANE 0.25 (0.010 MOTOROLA OUTLINE DIMENSIONS J SUFFIX CERAMIC PACKAGE CASE 620–10 ISSUE V –B – 0.25 (0.010 SUFFIX PLASTIC PACKAGE CASE 648–08 ...

Page 11

... Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. All operating parameters, including “ ...

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