HT46R74D-1 Holtek Semiconductor, HT46R74D-1 Datasheet - Page 19

• Manufacturer Part Number: HT46R74D-1
• Description: Dual Slope A/D Type MCU
• Manufacturer: Holtek Semiconductor

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Timer/Event Counter
Two timer/event counters are integrated within the
microcontroller. The Timer/Event Counter 0 contains a
8-bit programmable count-up counter whose clock may
come from an external source or an internal clock
source. The internal clock source comes from f
Timer/Event Counter 1 contains a 18-bit programmable
count-up counter whose clock may come from an exter-
nal source or an internal clock source. The internal clock
source comes from f
figuration option. The external clock input allows exter-
nal events to be counted, time intervals or pulse widths
to be measured, or to generate an accurate time base.
There are two registers related to the Timer/Event
Counter 0, TMR0 and TMR0C. Two physical registers
are mapped to the TMR0 location. Writing to TMR0
places the start value into the Timer/Event Counter 0
register while reading TMR0 reads directly the contents
of the Timer/Event Counter 0. TMR0C is a timer/event
counter control register, which defines some options.
There are four registers related to Timer/Event Counter
1, TMR1HH, TMR1H, TMR1L and TMR1C. Writing to
TMR1L and TMR1H will only put the required data into
two internal lower-order byte buffers, each of which is
8-bits. Writing to TMR1HH will transfer the specified
data and the contents of the lower-order byte buffers
into the TMR1HH, TMR1H and TMR1L registers re-
spectively. The Timer/Event Counter 1 preload register
is changed by each write to the TRM1HH register opera-
tion. Reading TMR1HH will latch the contents of
Rev. 1.10
SYS
/4 or 32768Hz selected by con-
Timer/Event Counter 0
Timer/Event Counter 1
SYS
. The
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TMR1HH to the destination and latch the TMR1H and
TMR1L counters to the lower-order byte buffers, respec-
tively. Reading the TMR1H and TMR1L registers will
read the contents of the lower-order byte buffers.
TMR1C is the Timer/ Event Counter 1 control register,
which defines the operating mode, counting enable or
disable and an active edge.
The T0M0, T0M1 (TMR0C) and T1M0, T1M1 (TMR1C)
bits define the operation mode. The event count mode is
used to count external events, which means that the
clock source comes from an external pin, TMR0 or
TMR1. The timer mode functions as a normal timer with
the clock source coming from the internally selected
clock source. Finally, the pulse width measurement
mode can be used to measure a high or low level dura-
tion of an external signal on pin TMR0 or TMR1. This
measurement uses the internally selected clock source.
To enable a counting operation, the Timer ON bit,
(T0ON: bit 4 of TMR0C; T1ON: 4 bit of TMR1C) should
be set to 1. In the pulse width measurement mode, the
T0ON/T1ON bit is automatically cleared after the mea-
surement cycle is completed. But in the other two
modes, the T0ON/T1ON bits can only be reset using in-
structions. The Timer/Event Counter 0/1 overflow is one
of the wake-up sources. The timers and can also be
used as the source clock for the PFD (Programmable
Frequency Divider) output on PA3. This function is se-
lected by a configuration option. Only one Timer/Event
Counter clock source (PFD0 or PFD1) can be used as
the PFD clock source, chosen by a configuration option.
HT46R74D-1
January 11, 2007