HT48R03 Holtek Semiconductor, HT48R03 Datasheet - Page 16

• Manufacturer Part Number: HT48R03
• Description: (HT48R01 - HT48R03) 10-Pin MSOP I/O Type 8-Bit OTP MCU
• Manufacturer: Holtek Semiconductor

Timer/Event Counter
One or two timer/event counters are implemented in the
microcontroller. The timer/event counter contains an 8-bit
programmable count-up counter and the clock may come
from an external source, the system clock or RTC clock.
Using an external clock input allows the user to count
external events, measure time internals or pulse widths,
or generate an accurate time base, while using the inter-
nal clock allows the user to generate an accurate time
base.
The timer/event counter can generate a buzzer signal
by using an external or internal clock.
There are 2 registers related to the timer/event counter;
TMR0 [0DH], TMR0C [0EH] (TMR1 [10H]), TMR1C
[11H]). Two physical registers are mapped to the TMR lo-
cation; writing TMR0 (TMR1) places the start value into
the timer/event counter preload register while reading
TMR0 (TMR1) retrieves the contents of the timer/event
counter. The TMR0C (TMR1C) is a timer/ event counter
control register, which defines some options.
The T0M0, T0M1 (T1M0, T1M1) bits define the operat-
ing mode. The event count mode is used to count exter-
nal events, which means the clock source comes from
an external TMR0 (TMR1) pin. The timer mode func-
tions as a normal timer with the clock source coming
from the f
can be used to count the high or low level duration of the
external signal TMR0 (TMR1). The counting is based on
the f
Rev. 1.00
INT
clock.
INT
clock. The pulse width measurement mode
Timer/Event Counter 1 - HT48R02/HT48R03 only
Timer/Event Counter 0
16
In the event count or timer mode, once the timer/event
counter starts counting, it will count from the current
contents in the timer/event counter to FFH. Once an
overflow occurs, the counter is reloaded from the
timer/event counter preload register and generates an
interrupt request flag (T0F; bit 5 of INTC0 or T1F bit 6 of
INTC0) at the same time.
In the pulse width measurement mode with the values of
T0ON and T0E ( T1ON and T1E) equal to 1, after the
TMR0 (TMR1) has received a low to high transient (or
high to low if T0E (T1E) is 0 ), it will start counting until
TMR0 (TMR1) returns to its original level and resets
T0ON (T1ON). The measured result remains in the
timer/event counter even if the activated transient oc-
curs again. In other words, only a single cycle measure-
ment can be implemented. Not until the T0ON (T1ON)
bit has been set again, will the cycle measurement func-
tion again as long as it receives further transient pulses.
Note that, in this operating mode, the timer/event coun-
ter starts counting not according to the logic level but ac-
cording to the transient edges. In the case of counter
overflows, the counter is reloaded from the timer/event
counter preload register and issues the interrupt request
just like the other two modes. To enable the counting op-
eration, the timer ON bit, T0ON (T1ON) should be set to
1. In the pulse width measurement mode, the T0ON
(T1ON) will be cleared automatically after the measure-
ment cycle is completed. But in the other two modes the
T0ON (T1ON) can only be reset by instructions. The
overflow of the timer/event counter is one of the
wake-up sources. No matter what the operation mode
is, writing a 0 to ETI can disable the interrupt service.
HT48R01/HT48R02/HT48R03
December 20, 2006