LM1276AAA National Semiconductor, LM1276AAA Datasheet
LM1276AAA
Related parts for LM1276AAA
LM1276AAA Summary of contents
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... Fully addressable 512 Character OSD. n Internal 512 character OSD ROM usable as either (a) 384 2-color plus 128 4-color characters, (b) 640 2-color characters, or (c) some combination in between. n Internal 512 character RAM. © 2005 National Semiconductor Corporation 2 n Enhanced I C compatible microcontroller interface to allow versatile Page RAM access. ...
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Internal Block Diagram www.national.com FIGURE 1. Block Diagram 2 20096961 ...
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... Internal Block Diagram (Continued) FIGURE 2. LM1276 Pinout Order Number LM1276AAA/NA See NS Package Number N28D 3 20096962 www.national.com ...
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... Absolute Maximum Ratings 3) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage V , Pins 10, 14, 17, CC and 22 Peak Video DC Output Source Current (Any One Amp) Pins 23 Voltage at Any Input Pin (V ...
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Video Signal Electrical Characteristics Unless otherwise noted 25˚ numbers refer to the definitions in Table 1. See (Note 7) for Min and Max parameters and (Note 6) for Typicals. Symbol Parameter A G-50% Gain Attenuation @ ...
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OSD Electrical Characteristics Unless otherwise noted 25˚ Symbol Parameter ∆V Difference between OSD Black OSD-black (Track) Level and Video Black Level between any 2 channels ∆V (White) Output Match between Channels OSD V (Track) Output Variation ...
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System Interface Signal Characteristics Unless otherwise noted 25˚ for Min and Max parameters and (Note 6) for Typicals. DAC parameters apply to all 4 DACs. Symbol Parameter t H-Blank Time Delay - On H-BLANK ON t ...
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Register Test Settings Control No. of Bits 1 Contrast 7 0x7F (Max 0x7F Gain (Max) DC Offset 3 0x00 (Min) www.national.com (Continued) TABLE 1. Test Settings Test Settings 0x00 0x7F 0x7F Min (Max) ...
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OSD vs Video Intensity The OSD amplitude has been increased over the LM1237 level. During monitor alignment the three gain registers are used to achieve the desired front of screen color balance. This also causes the OSD channels to be ...
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Typical Performance Characteristics FIGURE 3. Logic Horizontal Blanking FIGURE 4. Logic Vertical Blanking FIGURE 5. Deflection Horizonal Blanking www.national.com 25˚C unless otherwise specified CC A 20096902 FIGURE 6. Logic Clamp Pulse 20096903 FIGURE 7. Red ...
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Typical Performance Characteristics otherwise specified (Continued) SYSTEM INTERFACE SIGNALS The Horizontal Sync, Flyback, Vertical Sync, and the Clamp input signals are important for proper functionality of the LM1276. Both blanking inputs must be present for ...
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Typical Performance Characteristics otherwise specified (Continued) VIDEO PROCESSING Emphasis, Center Frequency at Maximum Center Frequency, Emphasis at Maximum These two plots show the processing done by the LM1276 on the video input signal. There are ...
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Typical Performance Characteristics PPL=0 PPL=1 PLL Auto Pin Descriptions and Application Information Pin Pin Name No Sync 2 Analog Analog Ground REF EXT 5 Blue Video ...
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Pin Descriptions and Application Information Pin Pin Name No. 10 PLL Digital Ground 14 Digital SCL 13 SDA 15 H Sync 16 Digital Ground 17 Digital V CC www.national.com (Continued) Schematic The ground pin ...
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Pin Descriptions and Application Information Pin Pin Name No. 18 DAC 3 Output 19 DAC 2 Output 20 DAC 1 Output 21 Analog Ground 22 Analog Green Output 24 Red Output 25 Blue Output 26 ABL 27 ...
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Pin Descriptions and Application Information Pin Pin Name No Flyback www.national.com (Continued) Schematic Proper operation requires current reversal. R should be large enough to limit the peak current at pin 28 to about +4 mA during blanking, and ...
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Schematic Diagram FIGURE 9. LM1276/LM2476 Demo Board Schematic 17 20096924 www.national.com ...
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Schematic Diagram FIGURE 10. LM1276/LM2476 Demo Board Schematic (continued) www.national.com 18 20096925 ...
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PCB Layout FIGURE 11. LM1276/LM2476 Demo Board Layout 19 20096970 www.national.com ...
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Burn In Screen The LM1276 provides a Burn In Screen feature, where a full screen of white video will be displayed without the need for any video input. The Burn In Screen is enabled by setting bit 5 of register ...
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Video Detection for Auto-Sizing & Auto-Centering Auto Size Calculation Instruction Sequence • Set register bits 0xFFF8[5] and 0xFFF8[4] to high • Set register bits 0xFFFD[3] to low • Set register bit 0x8400[6] to high • Wait for 0x8400[7] to become ...
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Hi-Brite Video Enhancement Functional Description FIGURE 14. Overshoot Measurement Bits registers 0x85C8, 0x85CA, or 0x85CC control the emphasis. When a “4” is programmed into these bits the overshoot is typically 11%. A “0” will give no ...
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OSD Generator Operation PAGE OPERATION Figure 16 shows the block diagram of the OSD generator. OSD screens are created using any of the 512 predefined characters stored in the mask programmed ROM. The LM1276 offers a full 9-bit character code ...
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OSD Generator Operation OSD VIDEO TIMING Please refer to the LM1247 datasheet for details. CHARACTER CELL Please refer to the LM1247 datasheet for details. FOUR COLOR FONT AS TWO 2-COLOR Please refer to the LM1247 datasheet for details. ATTRIBUTE TABLES ...
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Microcontroller Interface written to is next sent in two bytes, the least significant byte being sent first. The master can then send the data, which consists of one or more bytes. Each data byte is followed by an acknowledge bit. ...
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LM1276 Address Map CHARACTER ROM The 512 font characters from 0x0000 to 0x7FFF can be read from ROM by addressing the individual pixel rows of the desired character. Since the characters have 12 columns, it takes two bytes to read ...
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LM1276 Address Map Address Range 0x8000–0x81FF Address 0x8000–0x81FF RAM Data Format Each of the 512 locations in the page RAM is comprised of a 13-bit code consisting of an 9-bit character or control code, and a 4-bit attribute code. Each ...
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... COLWIDTH2B2 0x841E 0x00 COLWIDTH2B3 0x841F 0x00 Any registers in the range of 0x8420–0x8426 are for National Semiconductor internal use only and should not be written to under application conditions. FADE_INTVL 0x8429 0x35 PREAMPLIFIER CONTROL These registers, shown in Table 12, control the gains, DAC outputs, PLL, horizontal and vertical blanking, OSD contrast and DC offset of the video outputs. Registers 0x8430– ...
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LM1276 Address Map TABLE 12. LM1276 Preamplifier Interface Registers Register Address Default BGAINCTRL 0x8430 0x60 GGAINCTRL 0x8431 0x60 RGAINCTRL 0x8432 0x60 CONTRCTRL 0x8433 0x60 DAC1CTRL 0x8434 0x80 DAC2CTRL 0x8435 0x80 DAC3CTRL 0x8436 0x80 DAC4CTRL 0x8437 0x80 DACOSDDCOFF 0x8438 0x24 GLOBALCTRL ...
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LM1276 Address Map Register Address Default V_BP0 0x8589 0xFF V_BP1 0x858A 0x07 V_FP0_PRV 0x858B 0xFF V_FP1_PRV 0x858C 0x07 V_SYN_PRV 0x858D 0xFF V_BP0_PRV 0x858E 0xFF V_BP1_PRV 0x858F 0x07 HB CONTROL 0x8590 0x40 STATUS 0x8591 0x00 MCU COMMAND 0x8592 0xFF SUB COMMAND ...
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Building Display Pages This communication protocol is known as the Auto Attribute Mode, which is also used by the LM1237 and LM1247. Please see examples of usage for this mode in the LM1247 datasheet. ENHANCED PAGE RAM ADDRESS MODES Since ...
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Building Display Pages The Page RAM address is not automatically incremented in this mode. This mode is very useful for modifying character codes and attributes in the first 256 locations of the Page RAM. The attribute byte is shown in ...
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Control Register Definitions Bit 5 Fade In/Out Enable. When this bit the OSD Fade In/Fade Out function is enabled. When this bit the function is disabled. Bit 6 Auto Size Enable. When this bit ...
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Control Register Definitions Bit 5 Reserved. This bit should be set to zero. Bit 6 Reserved. This bit should be set to zero. Bit 7 Setting this bit will cause a software reset. All registers (except this one) are loaded ...
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Control Register Definitions ROM Signature Control Register: X Bit 0 This controls the calculation of the ROM signature. Setting this bit causes the ROM to be read sequentially and a 16-bit checksum calculated over the 256 characters. The sum, modulo ...
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Control Register Definitions Display Window 1 Column Width: COLWIDTH1B3 (0x8417) COLWIDTH1B1 (0x8415) Bits 31–0 These are the Display Window 1 Column Width 2x Enable Bits. These 32 bits correspond to columns 31–0 of Display Window 1, respectively. A value of ...
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Control Register Definitions COLWIDTH2B1 (0x841D) Bits 31–0 These are the Display Window 2 Column Width 2x Enable Bits. These thirty-two bits correspond to columns 31–0 of Display Window 2, respectively. A value of zero indicates the column will have normal ...
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Pre-Amplifier Interface Registers Bits 6–0 This register determines the contrast gain and affects all three channels, blue, red and green. Bit 7 Reserved and should be set to zero. DAC 1 Output Level: Bits 7–0 This register determines the output ...
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Pre-Amplifier Interface Registers Bit 0 When this bit the video outputs are blanked (set to black level). When video is not blanked. Bit 1 When this bit the analog sections ...
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Pre-Amplifier Interface Registers Center Frequency: Center Frequency Bits 3–0 Reserved and should be set to zero. Bits 7–4 These 4 bits control the Center Frequency adjustment of the Hi-Brite window video signal for enhancement. ABL Control 0 Bits 3–0 These ...
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Pre-Amplifier Interface Registers Highlight Contrast TEXT: Res’d RSV Bits 6–0 These bits determine the amount of Highlight Contrast for the TEXT mode. Bit 7 Reserved and should be set to zero. Peak Control PIC Bits 2–0 These bits determine the ...
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Auto Size Registers Horizontal Flyback or Sync Duration: HF_S1 (0x8583) Reserved RSV RSV RSV RSV RSV Bits 9–0 This is a 10-bit wide register that records the measured value of the horizontal flyback or sync during video detect. When no ...
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Auto Size Registers (Continued) Bits 10–0 This is an 11-bit wide register that records the lowest measured value of the vertical back porch in terms of horizontal line periods during video detect. When no video is detected, the sum of ...
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Auto Size Registers (Continued) Bits 7 Interrupt Enable. This bit must be set activate the use of the interrupt bit in 0x8591 HiBrite Status Register: INTR RSV Bits 6–0 Reserved and should be set to zero. Bits ...
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Auto Size Registers (Continued) Bits 2–0 Reserved and should be set to zero. Bit 3 When enabling this bit, the H Flyback input is internally received from the H Sync input. Bits 7-4 Reserved and should be set to zero. ...
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Attribute Table and Enhanced Features ATT4C7n (0x8507+n* ATT4C5n (0x8505+n*4) Blue Color 3 - Green Color 3 - Red C3B0 C3G[2:0] ATT4C3n (0x8503+n*4) Reserved ATT4C1n (0x8501+n*4) Blue Color 1 - Green ...
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Attribute Table and Enhanced Features (Continued) Display Window 1 to Display Window 2 Spacing Please refer to the LM1247 datasheet for details. Evaluation Character Fonts The character font for evaluation of the LM1276 is shown in Figure 19 through Figure ...
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Attribute Table and Enhanced Features FIGURE 22. ROM Bank 3 Four Color Character Font www.national.com (Continued) FIGURE 21. ROM Bank 2 Two Color Character Font FIGURE 23. ROM Bank 4 Two Color Character Font 48 20096946 20096947 20096948 ...
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Attribute Table and Enhanced Features FIGURE 24. ROM Bank 5 Two Color Character Font FIGURE 25. ROM Bank 6 Two Color Character Font FIGURE 26. ROM Bank 7 Four Color Character Font (Continued) 49 20096949 20096950 20096951 www.national.com ...
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