LM1276AAA National Semiconductor, LM1276AAA Datasheet - Page 12

• Manufacturer Part Number: LM1276AAA
• Description: 150 MHz I2C Compatible RGB Preamplifier with Internal 512 Character OSD ROM, 512 Character RAM and 4 DACs
• Manufacturer: National Semiconductor

www.national.com
Typical Performance
Characteristics
otherwise specified (Continued)
VIDEO PROCESSING
These two plots show the processing done by the LM1276
on the video input signal. There are two variables for the
video processing, emphasis and center frequency. Empha-
sis is controlled by bits 0-2 in registers 0x85C8, 0x85CA,
or 0x85CC. This gives 8 different levels of emphasis. In the
top plot the center frequency is set at its maximum level and
the 8 different levels of emphasis are measured. The video
with no emphasis is adjusted to a 0.7 V
maximum emphasis the video is increased to a 0.9 V
level at the rising edge of the video. If the falling edge was
measured it would show a similar waveform, but going in the
negative direction.
Center frequency is shown in the bottom plot. Control of the
center frequency is done with bits 4-7 in register
0x85C1. This gives 16 adjustments for this feature. Every
other adjustment is shown in the bottom plot, since showing
all 16 adjustments would have made the plot too difficult to
read. The curves closely approximate the peaking of an RC
Emphasis, Center Frequency at Maximum
Center Frequency, Emphasis at Maximum
V
CC
= 5V, T
A
= 25˚C unless
P-P
level. Using
20096964
20096963
P-P
12
network. Therefore, the term center frequency means the
RC time constant that is approximated by each curve in the
above plot. A true RC peaking network would give very large
overshoot. The LM1276 has special circuitry to clip the very
large overshoot, yet has the complete benefit of the RC
peaking. This special circuitry allows for much more over-
shoot than one could do with RC peaking and still not
saturate the video channel.
Note that the video channel with the emphasis also has its
own independent contrast control. This allows the user to
adjust his monitor for a brighter picture within the Hi-Brite
window and optimize the emphasis for the resolution he is
using with the monitor. Now, the monitor user can give his
pictures or video a special “sparkle” when using the capa-
bilities of the LM1276.
OSD PHASE LOCKED LOOP
The PLL in the LM1276 serves both the OSD as well as the
Hi-Brite Window generation. The pixels per line range for the
LM1276 OSD is from 704 to 1152 pixels per line, in incre-
ments of 64. The maximum OSD pixel frequency available is
111 MHz. For example, if the horizontal scan rate is 106 kHz,
1024 pixels per line would be acceptable to use, since the
OSD pixel frequency is:
If 1152 pixels per line is being used, the horizontal scan rate
would have to be lower than 106 kHz in order to not exceed
the maximum OSD pixel frequency of 111 MHz. The maxi-
mum number of video lines that may be used is 1536 lines as
in a 2048x1536 display. At this line rate, using a PPL setting
of 4 is recommended. The LM1276 has a PLL Auto feature,
which will automatically select an internal PLL frequency
range setting that will guarantee optimal OSD locking for any
horizontal scan rate and for improved jitter performance over
a wider temperature range. This eliminates the need for PLL
register settings determined by the user, as well as improved
PLL performance. To initialize the PLL Auto feature, set bit,
0x8439[4] to 1. This will effectively perform all necessary
calibrations and activate the PLL Auto mode, which takes
approximately 2–4 vertical scan period to complete, and
must be done while the video is blanked. Table 2 shows the
recommended horizontal scan rate ranges (in kHz) for each
pixels per line register setting, 0x8401[7:5]. These ranges
are recommended for chip ambient temperatures of 0
70
0.01 uF, and 1000 pF. While the OSD PLL will lock for other
register combinations and at scan rates outside these
ranges, the performance of the loop will be improved if these
recommendations are followed.
PLL AUTO MODE INITIALIZATION SEQUENCE
• Blank video.
• Set 0x8539[4] to 1.
• Wait for at least 2–4 vertical periods or vertical sync
• Unblank Video.
This sequence must be done by the microcontroller at sys-
tem power up, as well as each time there is a horizontal line
rate change from the video source, for the PLL Auto mode to
function properly.
o
pulses to pass.
C, and the recommended PLL filter values are 6.2 kΩ,
Horizontal Scan Rate X PPL =
106kHz X 1024 = 108.5 MHz
o
C to