87C196KC Intel Corporation, 87C196KC Datasheet - Page 5

• Manufacturer Part Number: 87C196KC
• Description: 16-BIT HIGH PERFORMANCE CHMOS MICROCONTROLLER
• Manufacturer: Intel Corporation

PIN DESCRIPTIONS
V
V
V
ANGND
V
XTAL1
XTAL2
CLKOUT
RESET
BUSWIDTH
NMI
INST
EA
ALE ADV
RD
WR WRL
BHE WRH
CC
SS
REF
PP
Symbol
Main supply voltage (5V)
Digital circuit ground (0V) There are three V
Reference voltage for the A D converter (5V) V
portion of the A D converter and the logic used to read Port 0 Must be connected for A D
and Port 0 to function
Reference ground for the A D converter Must be held at nominally the same potential as
V
Timing pin for the return from powerdown circuit Connect this pin with a 1 F capacitor to
V
is the programming voltage on the EPROM device
Input of the oscillator inverter and of the internal clock generator
Output of the oscillator inverter
Output of the internal clock generator The frequency of CLKOUT is
frequency
Reset input to the chip
Input for buswidth selection If CCR bit 1 is a one this pin selects the bus width for the bus
cycle in progress If BUSWIDTH is a 1 a 16-bit bus cycle occurs If BUSWIDTH is a 0 an
8-bit cycle occurs If CCR bit 1 is a 0 the bus is always an 8-bit bus
A positive transition causes a vector through 203EH
Output high during an external memory read indicates the read is an instruction fetch INST
is valid throughout the bus cycle INST is activated only during external memory accesses
and output low for a data fetch
Input for memory select (External Access) EA equal to a TTL-high causes memory
accesses to locations 2000H through 5FFFH to be directed to on-chip ROM EPROM EA
equal to a TTL-low causes accesses to those locations to be directed to off-chip memory
Address Latch Enable or Address Valid output as selected by CCR Both pin options
provide a signal to demultiplex the address from the address data bus When the pin is
ADV it goes inactive high at the end of the bus cycle ALE ADV is activated only during
external memory accesses
Read signal output to external memory RD is activated only during external memory reads
Write and Write Low output to external memory as selected by the CCR WR will go low for
every external write while WRL will go low only for external writes where an even byte is
being written WR WRL is activated only during external memory writes
Bus High Enable or Write High output to external memory as selected by the CCR BHE
0 selects the bank of memory that is connected to the high byte of the data bus A0
selects the bank of memory that is connected to the low byte of the data bus Thus
accesses to a 16-bit wide memory can be to the low byte only (A0
high byte only (A0
selected the pin will go low if the bus cycle is writing to an odd memory location BHE WRH
is valid only during 16-bit external memory write cycles
SS
SS
and a 1 M
resistor to V
e
1 BHE
CC
e
0) or both bytes (A0
If this function is not used V
Name and Function
SS
pins all of which must be connected
REF
is also the supply voltage to the analog
e
0 BHE
PP
AUTOMOTIVE 87C196KC
may be tied to V
e
e
0) If the WRH function is
0 BHE
the oscillator
e
CC
1) to the
This pin
e
0
e
5