DSP56156 Motorola Inc, DSP56156 Datasheet - Page 13

• Manufacturer Part Number: DSP56156
• Description: 16-bit Digital Signal Processor
• Manufacturer: Motorola Inc

On-Chip Emulation
(OnCE
DSCK/OS1 (Debug Serial Clock/Chip Status 1)
DSI/OS0 (Debug Serial Input/Chip Status 0) —
MOTOROLA
DSO (Debug Serial) — output. The debug
bidirectional. The DSI/OS0 pin, when
an input, is the pin through which seri-
al data or commands are provided to
the OnCE port controller. The data re-
ceived on the DSI pin will be recog-
nized only when the DSP has entered
the debug mode of operation. Data
must have valid TTL logic levels before
the serial clock falling edge. Data is al-
ways shifted into the OnCE serial port
most significant bit (MSB) first. When the
DSP is not in the debug mode, the DSI/
OS0 pin provides information about the
chip status if it is an output and used in
conjunction with the OS1 pin.
— bidirectional. The DSCK/OS1 pin,
when an input, is the pin through
which the serial clock is supplied to the
OnCE port. The serial clock provides
pulses required to shift data into and
out of the OnCE serial port. Data is
clocked into the OnCE port on the fall-
ing edge and is clocked out of the
OnCE serial port on the rising edge. If
the DSCK/OS1 pin is an output and
used in conjunction with the OS0 pin, it
provides information about the chip
status when the DSP is not in the debug
mode.
serial output provides the data con-
tained in one of the OnCE port control-
ler registers as specified by the last
command received from the command
controller. When idle, this pin is high.
When the requested data is available, the
DSO line will be asserted (negative true
logic) for four T cycles (one instruction
TM
Port)
Freescale Semiconductor, Inc.
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DSP56156 Data Sheet
On-Chip Codec
BIAS (Bias current) — input. This input is
AUX (Auxiliary) — input. This pin is select-
MIC (Microphone) — input. This pin is se-
DR (Debug Request) — input. The debug
cycle) to indicate that the serial shift reg-
ister is ready to receive clocks in order to
deliver the data. When the chip enters
the debug mode due to an external de-
bug request (DR), an internal software
debug request (DEBUG), a hardware
breakpoint occurrence or a trace/step
occurrence, this line will be asserted for
three T cycles to indicate that the chip
has entered the debug mode and is wait-
ing for commands. Data is always shift-
ed out the OnCE serial port with the
most significant bit first.
request input provides a means of en-
tering the debug mode of operation.
This pin, when asserted, will cause the
DSP to finish the current instruction be-
ing executed, enter the debug mode,
and wait for commands to be entered
from the debug serial input line.
ed as the analog input to the A/D con-
verter when the INS bit is set in the
codec control register COCR. This pin
should be left floating when the codec
is not used.
used to determine the bias current for
the analog circuitry. Connecting a re-
sistor between BIAS and GNDA will
program the current bias generator.
This pin should be left floating when
the codec is not used.
lected as the analog input to the A/D
converter when the INS bit is cleared in
Pin Descriptions
On-Chip Codec
OnCE
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