LM3S101 Luminary Micro, Inc., LM3S101 Datasheet - Page 116

• Manufacturer Part Number: LM3S101
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

General-Purpose Input/Outputs (GPIOs)
116
Reset
Reset
Type
Type
Bit/Field
31:8
GPIO 4-mA Drive Select (GPIODR4R)
Offset 0x504
7:0
RO
RO
31
15
0
0
Register 12: GPIO 4-mA Drive Select (GPIODR4R), offset 0x504
The GPIODR4R register is the 4-mA drive control register. It allows for each GPIO signal in the
port to be individually configured without affecting the other pads. When writing the DRV4 bit for a
GPIO signal, the corresponding DRV2 bit in the GPIODR2R register and the DRV8 bit in the
GPIODR8R register are automatically cleared by hardware.
RO
RO
30
14
0
0
reserved
Name
DRV4
RO
RO
29
13
0
0
RO
RO
28
12
0
0
reserved
Type
R/W
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
Reset
0x00
0
RO
RO
25
0
9
0
Preliminary
Description
Reserved bits return an indeterminate value, and should never
be changed.
Output Pad 4-mA Drive Enable
A write of 1 to either
corresponding 4-mA enable bit. The change is effective on the
second clock cycle after the write.
RO
RO
24
0
8
0
reserved
R/W
RO
23
0
7
0
R/W
RO
22
0
6
0
GPIODR2
R/W
RO
21
0
5
0
R/W
RO
20
0
4
0
[n] or
DRV4
R/W
GPIODR8
RO
19
0
3
0
R/W
RO
18
0
2
0
October 5, 2006
[n] clears the
R/W
RO
17
0
1
0
R/W
RO
16
0
0
0