LM3S2110-IQN20-A0 Luminary Micro, Inc., LM3S2110-IQN20-A0 Datasheet - Page 406

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LM3S2110-IQN20-A0

Manufacturer Part Number
LM3S2110-IQN20-A0
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
Pulse Width Modulator (PWM)
16.4
Table 16-1. PWM Register Map
406
Offset
0x00C
0x01C
0x04C
0x05C
0x000
0x004
0x008
0x010
0x014
0x018
0x020
0x040
0x044
0x048
0x050
0x054
0x058
0x060
0x064
0x068
Name
PWMCTL
PWMSYNC
PWMENABLE
PWMINVERT
PWMFAULT
PWMINTEN
PWMRIS
PWMISC
PWMSTATUS
PWM0CTL
PWM0INTEN
PWM0RIS
PWM0ISC
PWM0LOAD
PWM0COUNT
PWM0CMPA
PWM0CMPB
PWM0GENA
PWM0GENB
PWM0DBCTL
8.
9.
10.
Register Map
Table 16-1 on page 406 lists the PWM registers. The offset listed is a hexadecimal increment to the
register’s address, relative to the PWM base address of 0x4002.8000.
Set the pulse width of the PWM1 pin for a 75% duty cycle.
Start the timers in PWM generator 0.
Enable PWM outputs.
Write the PWM0CMPA register with a value of 0x0000.012B.
Write the PWM0CMPB register with a value of 0x0000.0063.
Write the PWM0CTL register with a value of 0x0000.0001.
Write the PWMENABLE register with a value of 0x0000.0003.
R/W1C
R/W1C
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
Reset
Preliminary
Description
PWM Master Control
PWM Time Base Sync
PWM Output Enable
PWM Output Inversion
PWM Output Fault
PWM Interrupt Enable
PWM Raw Interrupt Status
PWM Interrupt Status and Clear
PWM Status
PWM0 Control
PWM0 Interrupt Enable
PWM0 Raw Interrupt Status
PWM0 Interrupt Status and Clear
PWM0 Load
PWM0 Counter
PWM0 Compare A
PWM0 Compare B
PWM0 Generator A Control
PWM0 Generator B Control
PWM0 Dead-Band Control
November 29, 2007
page
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