LM3S317-IQN20-A0T Luminary Micro, Inc., LM3S317-IQN20-A0T Datasheet - Page 347

• Manufacturer Part Number: LM3S317-IQN20-A0T
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

May 4, 2007
Reset
Reset
Type
Type
Bit/Field
31:12
PWMn Dead-Band Falling-Edge-Delay Register (PWMnDBFALL)
11:0
RO
RO
31
15
0
0
Register 22: PWM0 Dead-Band Falling-Edge-Delay (PWM0DBFALL), offset 0x070
The PWM0DBFALL register contains the number of clock ticks to delay the falling edge of the
PWM0A signal when generating the PWM1 signal. If the dead-band generator is disabled, this
register is ignored. If the value of this register is larger than the width of a Low pulse on the input
PWM signal, the falling-edge delay consumes the entire Low time of the signal, resulting in no Low
time on the output. Care must be taken to ensure that the input Low time always exceeds the
falling-edge delay.
RO
RO
30
14
0
0
reserved
FallDelay
reserved
Name
RO
RO
29
13
0
0
RO
RO
28
12
0
0
R/W
R/W
RO
RO
27
11
0
0
Type
R/W
RO
26
10
0
0
R/W
RO
25
0
9
0
0
0
Reset
Preliminary
R/W
RO
24
0
8
0
reserved
Description
Reserved bits return an indeterminate value, and should
never be changed.
The number of clock ticks to delay the falling edge.
R/W
RO
23
0
7
0
R/W
RO
22
0
6
0
FallDelay
R/W
RO
21
0
5
0
R/W
RO
20
0
4
0
R/W
RO
19
0
3
0
LM3S317 Data Sheet
R/W
RO
18
0
2
0
R/W
RO
17
0
1
0
R/W
RO
16
0
0
0
347