LM3S317-IQN20-A0T Luminary Micro, Inc., LM3S317-IQN20-A0T Datasheet - Page 38
![no-image](/images/no-image-200.jpg)
LM3S317-IQN20-A0T
Manufacturer Part Number
LM3S317-IQN20-A0T
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
1.LM3S317-IQN20-A0T.pdf
(379 pages)
- Current page: 38 of 379
- Download datasheet (3Mb)
ARM Cortex-M3 Processor Core
38
Reset
Reset
Type
Type
Bit/Field
31:24
23:0
SysTick Reload Value
Address: 0xE000E014
RO
R/W
31
15
0
-
Register 2: SysTick Reload Value Register
Use the SysTick Reload Value Register to specify the start value to load into the current value
register when the counter reaches 0. It can be any value between 1 and 0x00FFFFFF. A start
value of 0 is possible, but has no effect because the SysTick interrupt and COUNTFLAG are
activated when counting from 1 to 0.
Therefore, as a multi-shot timer, repeated over and over, it fires every N+1 clock pulse, where N is
any value from 1 to 0x00FFFFFF. So, if the tick interrupt is required every 100 clock pulses, 99
must be written into the RELOAD. If a new value is written on each tick interrupt, so treated as
single shot, then the actual count down must be written. For example, if a tick is next required after
400 clock pulses, 400 must be written into the RELOAD.
R/W
RO
30
14
0
-
RELOAD
reserved
Name
R/W
RO
29
13
0
-
RO
R/W
28
12
0
-
reserved
Type
W1C
RO
R/W
RO
27
11
0
-
Reset
R/W
RO
26
10
0
-
0
-
R/W
RO
25
0
9
-
Preliminary
Description
Reserved bits return an indeterminate value, and should never
be changed.
Value to load into the SysTick Current Value Register when the
counter reaches 0.
R/W
RO
24
0
8
-
RELOAD
R/W
R/W
23
-
7
-
R/W
R/W
22
-
6
-
R/W
R/W
21
-
5
-
R/W
R/W
20
-
4
-
RELOAD
R/W
R/W
19
-
3
-
R/W
R/W
18
-
2
-
R/W
R/W
17
May 4, 2007
-
1
-
R/W
R/W
16
-
0
-
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