LM3S600-IQN20-A0T Bookham Technology, Inc., LM3S600-IQN20-A0T Datasheet - Page 254
LM3S600-IQN20-A0T
Manufacturer Part Number
LM3S600-IQN20-A0T
Description
Microcontroller
Manufacturer
Bookham Technology, Inc.
Datasheet
1.LM3S600-IQN20-A0T.pdf
(378 pages)
- Current page: 254 of 378
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Synchronous Serial Interface (SSI)
12
12.1
12.2
254
Synchronous Serial Interface (SSI)
The Stellaris
serial communication with peripheral devices that have either Freescale SPI, MICROWIRE, or Texas
Instruments synchronous serial interfaces.
The Stellaris
■
■
■
■
■
■
Block Diagram
Figure 12-1. SSI Module Block Diagram
Functional Description
The SSI performs serial-to-parallel conversion on data received from a peripheral device. The CPU
accesses data, control, and status information. The transmit and receive paths are buffered with
SSIPCellID0
SSIPCellID1
SSIPCellID2
SSIPCellID3
Master or slave operation
Programmable clock bit rate and prescale
Separate transmit and receive FIFOs, 16 bits wide, 8 locations deep
Programmable interface operation for Freescale SPI, MICROWIRE, or Texas Instruments
synchronous serial interfaces
Programmable data frame size from 4 to 16 bits
Internal loopback test mode for diagnostic/debug testing
System Clock
Interrupt
Identification Registers
®
®
Synchronous Serial Interface (SSI) is a master or slave interface for synchronous
SSI module has the following features:
SSIPeriphID0
SSIPeriphID1
SSIPeriphID2
SSIPeriphID3
Control / Status
SSICR0
SSICR1
SSISR
SSIPeriphID4
SSIPeriphID5
SSIPeriphID6
SSIPeriphID7
Preliminary
Interrupt Control
Prescaler
SSICPSR
Clock
SSIDR
SSIMIS
SSIRIS
SSIICR
SSIIM
RxFIFO
TxFIFO
8 x 16
8 x 16
.
.
.
.
.
.
October 01, 2007
Transmit/
Receive
Logic
SSITx
SSIRx
SSIFss
SSIClk
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