LM3S600-IQN20-A0T Bookham Technology, Inc., LM3S600-IQN20-A0T Datasheet - Page 56

• Manufacturer Part Number: LM3S600-IQN20-A0T
• Description: Microcontroller
• Manufacturer: Bookham Technology, Inc.

System Control
6.4
56
Offset
0x05C
0x058
0x060
0x064
0x100
0x104
0x108
0x120
0x124
0x128
0x144
0x150
0x160
0x110
0x114
0x118
Name
MISC
RESC
RCC
PLLCFG
RCGC0
RCGC1
RCGC2
SCGC0
SCGC1
SCGC2
DCGC0
DCGC1
DCGC2
DSLPCLKCFG
CLKVCLR
LDOARST
Register Descriptions
All addresses given are relative to the System Control base address of 0x400F.E000.
R/W1C
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
0x07A0.3AD1
0x0000.0000
0x0780.0000
0x0000.0000
0x0000.0000
0x00000040
0x00000000
0x00000000
0x00000040
0x00000000
0x00000000
0x00000040
0x00000000
0x00000000
Reset
-
-
Preliminary
Description
Masked Interrupt Status and Clear
Reset Cause
Run-Mode Clock Configuration
XTAL to PLL Translation
Run Mode Clock Gating Control Register 0
Run Mode Clock Gating Control Register 1
Run Mode Clock Gating Control Register 2
Sleep Mode Clock Gating Control Register 0
Sleep Mode Clock Gating Control Register 1
Sleep Mode Clock Gating Control Register 2
Deep Sleep Mode Clock Gating Control Register 0
Deep Sleep Mode Clock Gating Control Register 1
Deep Sleep Mode Clock Gating Control Register 2
Deep Sleep Clock Configuration
Clock Verification Clear
Allow Unregulated LDO to Reset the Part
October 01, 2007
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